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M-88L70-01T 数据表(PDF) 6 Page - Clare, Inc. |
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M-88L70-01T 数据表(HTML) 6 Page - Clare, Inc. |
6 / 8 page www.clare.com 6 M-88L70 Rev. 1 Figure 4 Single-Ended Input Configuration Figure 5 Guard Time Adjustment Figure 6 Timing Diagram Explanation of Events (A) Tone bursts detected, tone duration invalid, outputs not updated. (B) Tone #n detected, tone duration valid, tone decoded and latched in outputs. (C) End of tone #n detected, tone absent duration valid, outputs remain latched until next valid tone. (D) Outputs switched to high impedance state. (E) Tone #n + 1 detected, tone duration valid, tone decod- ed and latched in outputs (currently high impedance). (F) Acceptable dropout of tone #n + 1, tone absent duration invalid, outputs remain latched. (G) End of tone #n + 1 detected, tone absent duration valid, outputs remain latched until next valid tone. Explanation of Symbols V IN DTMF composite input signal. ESt Early steering output. Indicates detection of valid tone frequencies. St/GT Steering input/guard time output. Drives external RC timing circuit. Q1 - Q4 4-bit decoded tone output. StD Delayed steering output. Indicates that valid frequencies have been present/absent for the required guard time, thus constituting a valid signal. OE Output enable (input). A low level shifts Q1 - Q4 to its high impedance state. t REC Maximum DTMF signal duration not detected as valid. t REC Minimum DTMF signal duration required for valid recognition. t ID Minimum time between valid DTMF signals. t DO Maximum allowable dropout during valid DTMF signal. t DP Time to detect the presence of valid DTMF signals. t DA Time to detect the absence of valid DTMF signals. t GTP Guard time, tone present. t GTA Guard time, tone absent. |
类似零件编号 - M-88L70-01T |
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类似说明 - M-88L70-01T |
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