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CS49400 数据表(PDF) 8 Page - Cirrus Logic |
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CS49400 数据表(HTML) 8 Page - Cirrus Logic |
8 / 100 page 8 1.4 Digital D.C. Characteristics for VDDSD Level I/O (TA =25 °C;VDDSD = 3.3 V±; measurements performed under static conditions.) 1.5 Power Supply Characteristics (TA =25 °C; VDD, PLLVDD = 2.5 V; VDDSD = 3.3 V;measurements performed under operating conditions) 1.6 Switching Characteristics— RESET (TA =25 °C; VDD, PLLVDD= 2.5 V; VDDSD = 3.3 V; CL =20 pF) Parameter Symbol Min Typ Max Unit High-level input voltage VIH 0.65xVDDSD V Low-level input voltage VIL 0.35xVDDSD V High-level output voltage at IO = –2.0 mA VOH 0.9xVDDSD V Low-level output voltage at IO =2.0 mA VOL 0.1xVDDSD V Input leakage current (except all pins with internal pull- up) Iin 10 µA Input leakage current (all pins with internal pull-up) 50 µA Parameter Symbol Min Typ Max Unit Power supply current: Core and I/O operating: VSS PLL operating: PLLVSS Memory operating: VSSSD 400 6 25 mA mA mA Parameter Symbol Min Max Unit RESET minimum pulse width low Trstl 10 - µs All bidirectional pins high-Z after RESET low Trst2z 50 ns Configuration bits setup before RESET high Trstsu 50 - ns Configuration bits hold after RESET high Trsthld 15 - ns RESET T rst2z T rstl T rstsu T rsthld FHS0,1,2 UHS0,1,2 All Bidirectional Pins Figure 1. RESET Timing |
类似零件编号 - CS49400 |
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类似说明 - CS49400 |
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