CS4812

DS291PP3

3

Figure 11.Single Ended Input ................................................................................... 18

Figure 12.Butterworth Output Filters ........................................................................ 18

Figure 13.Output Mute Circuit .................................................................................. 19

Figure 14.Control Port Timing, SPI Master Mode AutoBoot ..................................... 20

Figure 15.Control Port Timing, SPI Slave Mode Write ............................................. 20

Figure 16.SPI Slave Write Flow Diagram ................................................................. 21

Figure 17.Control Port Timing, SPI Slave Mode Read ............................................. 21

Figure 18.SPI Slave Mode Read Flow Diagram........................................................ 22

Figure 19.SPI Slave Mode Read Flow Diagram with DSP REQ .............................. 22

Figure 26.HostBoot Flow Diagram ........................................................................... 27

Figure 27.CS4812 Suggested Layout ...................................................................... 28

Figure 28.Pin Assignments ...................................................................................... 29