数据搜索系统,热门电子元器件搜索 |
|
L6747A 数据表(PDF) 9 Page - STMicroelectronics |
|
L6747A 数据表(HTML) 9 Page - STMicroelectronics |
9 / 15 page L6747A Device description and operation Doc ID 17126 Rev 1 9/15 4.1 High-impedance (HiZ) management The driver is capable of managing a high-impedance conditions by keeping all MOSFETs in an OFF state. This is achieved in two different ways: ● If the EN signal is pulled low, the device keeps all MOSFETs OFF regardless of the PWM status. ● When EN is asserted, if the PWM signal is externally set within the HiZ window for a time greater than the hold-off time, the device detects the HiZ condition and turns off all the MOSFETs. The HiZ window is defined as the PWM voltage range between VPWM_HIZ_H = 1.6 V and VPWM_HIZ_L = 1.3 V. The device exits from the HiZ state after any PWM transition. See Figure 4 for details about HiZ timing. The implementation of the high-impedance state allows the controller connected to the driver to manage the high-impedance state of its output, preventing the generation of nega- tive undershoot on the regulated voltage during the shutdown stage. Also, different power management states may be managed, such as pre-bias startup. 4.2 Preliminary OV protection When VCC exceeds its UVLO threshold while the device is in HiZ, theL6747A activates the preliminary OV protection. The intent of this protection feature is to protect the load during system startup, especially from high-side MOSFET failures. In fact, VRM, and more generally PWM, controllers, have a 12 V bus-compatible turn-on threshold and are non-operative if VCC is below the turn-on thresholds (which is in the range of about 10 V). In cases of high-side MOSFET failure, the controller does not recognize the overvoltage until VCC = ~10 V (unless other special fea- tures are implemented). However, in this case the output voltage is already at the same volt- age (~10 V) and the load (a CPU in most cases) is already burnt. The L6747A bypasses the PWM controller by latching on the low-side MOSFET if the PHASE pin voltage exceeds 1.8 V during the HiZ state. When the PWM input exits from the HiZ window, the protection is reset and the control of the output voltage is transferred to the controller connected to the PWM input. Since the driver has its own UVLO threshold, a simple way to provide protection to the out- put in all conditions when the device is OFF is to supply the controller through the 5 VSB bus. 5 VSB is always present before any other voltage and, in case of high-side short, the low- side MOSFET is driven with 5 V. This ensures reliable protection of the load. Preliminary OV is active after UVLO and while the driver is in an HiZ state, and it is disabled after the first PWM transition. The controller must manage its output voltage from that moment on. 4.3 BOOT capacitance design The L6747A embeds a bootstrap diode to supply the high-side driver, removing the neces- sity for an external component. Simply connecting an external capacitor between BOOT and PHASE completes the high-side supply connections. |
类似零件编号 - L6747A |
|
类似说明 - L6747A |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |