数据搜索系统,热门电子元器件搜索 |
|
ADC083000 数据表(PDF) 11 Page - Texas Instruments |
|
|
ADC083000 数据表(HTML) 11 Page - Texas Instruments |
11 / 48 page ADC083000 www.ti.com SNAS358N – JUNE 2006 – REVISED JULY 2009 CONVERTER ELECTRICAL CHARACTERISTICS (continued) The following specifications apply after calibration for VA = VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential 820mVP-P, CL = 10 pF, Differential a.c. coupled Sinewave Input Clock, fCLK = 1.5GHz at 0.5VP-P with 50% duty cycle, VBG = Floating, Non-Extended Control Mode, SDR Mode, REXT = 3300Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differential, after calibration. Boldface limits apply for TA = TMIN to TMAX. All other limits TA = 25°C, unless otherwise noted. (1)(2) Units Symbol Parameter Conditions Typical(3) Limits (3) (Limits) VCMO − 50 mV (min) VCMI Analog Input Common Mode Voltage VCMO VCMO + mV (max) 50 Differential 0.08 pF CIN Analog Input Capacitance (5)(6) Each input pin to ground 2.2 pF 95 Ω (min) RIN Differential Input Resistance 100 105 Ω (max) ANALOG OUTPUT CHARACTERISTICS 0.95 V (min) VCMO Common Mode Output Voltage ICMO = ±100 µA 1.26 1.45 V (max) VA = 1.8V 0.60 V VCMO input threshold to set DC Coupling VCMO_LVL mode VA = 2.0V 0.66 V Common Mode Output Voltage Temperature TC VCMO TA = −40°C to +85°C 118 ppm/°C Coefficient CLOAD VCMO Maximum VCMO load Capacitance 80 pF 1.20 V (min) VBG Bandgap Reference Output Voltage IBG = ±100 µA 1.26 1.33 V (max) Bandgap Reference Voltage Temperature TA = −40°C to +85°C, TC VBG 28 ppm/°C Coefficient IBG = ±100 µA Maximum Bandgap Reference load CLOAD VBG 80 pF Capacitance TEMPERATURE DIODE CHARACTERISTICS 192 µA vs. 12 µA, 71.23 mV TJ = 25°C ΔVBE Temperature Diode Voltage 192 µA vs. 12 µA, 85.54 mV TJ = 85°C LVDS INPUT CHARACTERISTICS 0.4 VP-P (min) Sine Wave Clock 0.6 2.0 VP-P (max) VID Differential Clock Input Level 0.4 VP-P (min) Square Wave Clock 0.6 2.0 VP-P (max) II Input Current VIN = 0 or VIN = VA ±1 µA Differential 0.02 pF CIN Input Capacitance (7)(8) Each input to ground 1.5 pF (5) The analog and clock input capacitances are die capacitances only. Additional package capacitances of 0.65 pF differential and 0.95 pF each pin to ground are isolated from the die capacitances by lead and bond wire inductances. (6) This parameter is specified by design and is not tested in production. (7) The analog and clock input capacitances are die capacitances only. Additional package capacitances of 0.65 pF differential and 0.95 pF each pin to ground are isolated from the die capacitances by lead and bond wire inductances. (8) This parameter is specified by design and is not tested in production. Copyright © 2006–2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADC083000 |
类似零件编号 - ADC083000 |
|
类似说明 - ADC083000 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |