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DRV8301-Q1 Datasheet(数据表) 7 Page - Texas Instruments

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部件型号  DRV8301-Q1
说明  AUTOMOTIVE THREE PHASE PRE-DRIVER WITH DUAL CURRENT SHUNT AMPLIFIERS
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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DRV8301-Q1 Datasheet(HTML) 7 Page - Texas Instruments

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DRV8301-Q1
www.ti.com
SLOS842 – SEPTEMBER 2013
RECOMMENDED OPERATING CONDITIONS
MIN
TYP MAX
UNITS
PVDD1
DC supply voltage PVDD1 for normal operation
Relative to PGND
6
60
V
PVDD2
DC supply voltage PVDD2 for buck converter
3.5
60
V
CPVDD1
External capacitance on PVDD1 pin (ceramic cap) 20% tolerance
4.7
µF
CPVDD2
External capacitance on PVDD2 pin (ceramic cap) 20% tolerance
4.7
µF
CAVDD
External capacitance on AVDD pin (ceramic cap) 20% tolerance
1
µF
CDVDD
External capacitance on DVDD pin (ceramic cap) 20% tolerance
1
µF
CGVDD
External capacitance on GVDD pin (ceramic cap) 20% tolerance
2.2
µF
CCP
Flying cap on charge pump pins (between CP1 and CP2) (ceramic cap) 20% tolerance
22
nF
CBST
Bootstrap cap (ceramic cap)
100
nF
IDIN_EN
Input current of digital pins when EN_GATE is high
100
µA
IDIN_DIS
Input current of digital pins when EN_GATE is low
1
µA
CDIN
Maximum capacitance on digital input pin
10
pF
CO_OPA
Maximum output capacitance on outputs of shunt amplifier
20
pF
Dead time control resistor range. Time range is 50ns (-GND) to 500ns (150k
Ω) with a
RDTC
0
150
k
linear approximation.
IFAULT
FAULT pin sink current. Open-drain
V = 0.4 V
2
mA
IOCTW
OCTW pin sink current. Open-drain
V = 0.4 V
2
mA
VREF
External voltage reference voltage for current shunt amplifiers
2
6
V
Qg(TOT) = 25 nC or total 30 mA gate
fgate
Operating switching frequency of gate driver
200
kHz
drive average current
Igate
Total average gate drive current
30
mA
TA
Ambient temperature
–40
125
°C
ELECTRICAL CHARACTERISTICS
PVDD = 6 V to 60 V, TC = 25°C, unless specified under test condition
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT PINS: INH_X, INL_X, M_PWM (SCS), M_OC (SDI), GAIN(SDO), EN_GATE, DC_CAL
VIH
High input threshold
2
V
VIL
Low input threshold
0.8
V
REN_GATE
Internal pull down resistor for EN_GATE
100
k
Ω
Internal pull down resistor for high side PWMs
RINH_X
EN_GATE high
100
k
Ω
(INH_A, INH_B, and INH_C)
Internal pull down resistor for low side PWMs
RINH_X
EN_GATE high
100
k
Ω
(INL_A, INL_B, and INL_C)
RSCS
Internal pull down resistor for SCS
EN_GATE high
100
k
Ω
RSDI
Internal pull down resistor for SDI
EN_GATE high
100
k
Ω
RDC_CAL
Internal pull down resistor for DC_CAL
EN_GATE high
100
k
Ω
RSCLK
Internal pull down resistor for SCLK
EN_GATE high
100
k
Ω
OUTPUT PINS: FAULT AND OCTW
VOL
Low output threshold
IO = 2 mA
0.4
V
External 47 k
Ω pull up resistor
VOH
High output threshold
2.4
V
connected to 3-5.5 V
Leakage Current on Open Drain Pins When
IOH
1
µA
Logic High (FAULT and OCTW)
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Links: DRV8301-Q1




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