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AT87F52 数据表(PDF) 7 Page - ATMEL Corporation |
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AT87F52 数据表(HTML) 7 Page - ATMEL Corporation |
7 / 22 page AT87F52 7 Figure 2 shows Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The over- flow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by soft- ware. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 3. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer regis- ters, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt. Figure 2. Timer 2 Auto Reload Mode (DCEN = 0) Table 4. T2MOD—Timer 2 Mode Control Register OSC EXF2 TF2 T2EX PIN T2 PIN TR2 EXEN2 C/T2 = 0 C/T2 = 1 CONTROL RELOAD OVERFLOW CONTROL TRANSITION DETECTOR TIMER 2 INTERRUPT ÷12 RCAP2L RCAP2H TH2 TL2 T2MOD Address = 0C9H Reset Value = XXXX XX00B Not Bit Addressable —————— T2OE DCEN Bit 76543210 Symbol Function — Not implemented, reserved for future T2OE Timer 2 Output Enable bit. DCEN When set, this bit allows Timer 2 to be configured as an up/down counter. |
类似零件编号 - AT87F52 |
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类似说明 - AT87F52 |
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