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DS90UH926Q 数据表(PDF) 24 Page - Texas Instruments |
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DS90UH926Q 数据表(HTML) 24 Page - Texas Instruments |
24 / 56 page I2C Master upstream Transmitter HDCP Transmitter DS90UH925 I2C Slave HDCP Receiver DS90UH926 Parallel LVCMOS I2S Audio I2C HDCP Transmitter DS90UH925 I2C Slave downstream Receiver or Repeater downstream Receiver or Repeater FPD-Link III interfaces DS90UH926Q SNLS337J – OCTOBER 2010 – REVISED APRIL 2013 www.ti.com To support HDCP Repeater operation, the DS90UH926Q Deserializer includes the ability to control the downstream authentication process, assemble the KSV list for downstream HDCP Receivers, and pass the KSV list to the upstream HDCP Transmitter. An I2C master within the DS90UH926Q communicates with the I2C slave within the DS90UH925Q Serializer. The DS90UH925Q Serializer handles authenticating with a downstream HDCP Receiver and makes status available through the I2C interface. The DS90UH926Q monitors the transmit port status for each DS90UH925Q and reads downstream KSV and KSV list values from the DS90UH925Q. In addition to the I2C interface used to control the authentication process, the HDCP Repeater implementation includes two other interfaces. A parallel LVCMOS interface provides the unencrypted video data in 24-bit RGB format and includes the DE/VS/HS control signals. In addition to providing the RGB video data, the parallel LVCMOS interface communicates control information and packetized audio data during video blanking intervals. A separate I2S audio interface may optionally be used to send I2S audio data between the HDCP Receiver and HDCP Transmitter in place of using the packetized audio over the parallel LVCMOS interface. All audio and video data is decrypted at the output of the HDCP Receiver and is re-encrypted by the HDCP Transmitter. Figure 16 provides more detailed block diagram of a 1:2 HDCP repeater configuration. Figure 16. HDCP 1:2 Repeater Configuration Repeater Connections The HDCP Repeater requires the following connections between the HDCP Receiver and each HDCP Transmitter Figure 17. 1. Video Data – Connect PCLK, RGB and control signals (DE, VS, HS). 2. I2C – Connect SCL and SDA signals. Both signals should be pulled up to VDD33 with 4.7 kΩ resistors 3. Audio – Connect I2S_CLK, I2S_WC, and I2S_DA signals. 4. IDx pin – Each HDCP Transmitter and Receiver must have an unique I2C address. 5. MODE_SEL pin – All HDCP Transmitter and Receiver must be set into the Repeater Mode. 6. Interrupt pin– Connect DS90UH926Q INTB_IN pin to DS90UH925Q INTB pin. The signal must be pulled up to VDDIO. 24 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: DS90UH926Q |
类似零件编号 - DS90UH926Q |
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类似说明 - DS90UH926Q |
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