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EP2SGX90F 数据表(PDF) 56 Page - Altera Corporation

部件名 EP2SGX90F
功能描述  Section I. Stratix II GX Device Data Sheet
Download  316 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EP2SGX90F 数据表(HTML) 56 Page - Altera Corporation

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Altera Corporation
Stratix II GX Device Handbook, Volume 1
October 2007
Adaptive Logic Modules
Adaptive Logic
Modules
The basic building block of logic in the Stratix II GX architecture is the
ALM. The ALM provides advanced features with efficient logic
utilization. Each ALM contains a variety of look-up table (LUT)-based
resources that can be divided between two adaptive LUTs (ALUTs). With
up to eight inputs to the two ALUTs, one ALM can implement various
combinations of two functions. This adaptability allows the ALM to be
completely backward-compatible with four-input LUT architectures. One
ALM can also implement any function of up to six inputs and certain
seven-input functions.
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a
shared arithmetic chain, and a register chain. Through these dedicated
resources, the ALM can efficiently implement various arithmetic
functions and shift registers. Each ALM drives all types of interconnects:
local, row, column, carry chain, shared arithmetic chain, register chain,
and direct link interconnects. Figure 2–35 shows a high-level block
diagram of the Stratix II GX ALM while Figure 2–36 shows a detailed
view of all the connections in the ALM.
Figure 2–35. High-Level Block Diagram of the Stratix II GX ALM
DQ
To general or
local routing
reg0
To general or
local routing
datae0
dataf0
shared_arith_in
shared_arith_out
reg_chain_in
reg_chain_out
adder0
dataa
datab
datac
datad
Combinational
Logic
datae1
dataf1
DQ
To general or
local routing
reg1
To general or
local routing
adder1
carry_in
carry_out


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