数据搜索系统,热门电子元器件搜索
  Chinese▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

AD5557CRUZ Datasheet(数据表) 4 Page - Analog Devices

部件型号  AD5557CRUZ
说明  Dual-Current Output, Parallel Input, 16-/14-Bit Multiplying DACs
下载  20 Pages
Scroll/Zoom Zoom In 100% Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 

AD5557CRUZ Datasheet(HTML) 4 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 4 page
background image
AD5547/AD5557
Data Sheet
Rev. D | Page 4 of 20
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
SUPPLY CHARACTERISTICS
Power Supply Range
VDD RANGE
2.7
5.5
V
Positive Supply Current
IDD
Logic inputs = 0 V
10
μA
Power Dissipation
PDISS
Logic inputs = 0 V
0.055
mW
Power Supply Sensitivity
PSS
∆VDD = ±5%
0.003
%/%
AC CHARACTERISTICS4
Output Voltage Settling Time
tS
To ±0.1% of full scale, data cycles from zero scale
to full scale to zero scale
0.5
μs
Reference Multiplying BW
BW
VREF = 100 mV rms, data = full scale
6.8
MHz
DAC Glitch Impulse
Q
VREF = 0 V, midscale – 1 to midscale
−3.5
nV-s
Multiplying Feedthrough Error
VOUT/VREF
VREF = 100 mV rms, f = 10 kHz
−78
dB
Digital Feedthrough
QD
WR = 1, LDAC toggles at 1 MHz
7
nV-s
Total Harmonic Distortion
THD
VREF = 5 V p-p, data = full scale, f = 1 kHz
−104
dB
Output Noise Density
eN
f = 1 kHz, BW = 1 Hz
12
nV/√Hz
Analog Crosstalk
CAT
Signal input at Channel A and measures the
output at Channel B, f = 1 kHz
−95
dB
1 All static performance tests (except IOUT) are performed in a closed-loop system using an external precision OP97 I-to-V converter amplifier. The device RFB terminal is
tied to the amplifier output. The +IN pin of the OP97 is grounded, and the IOUT of the DAC is tied to the OP97’s −IN pin. Typical values represent average readings
measured at 25°C.
2 Guaranteed by design; not subject to production testing.
3 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and are timed from a voltage level of 1.5 V.
4 All ac characteristic tests are performed in a closed-loop system using an AD8038 I-to-V converter amplifier except for THD where the AD8065 was used.
Timing Diagram
tWR
tDS
tDH
tLWD
tLDAC
tRS
WR
DATA
LDAC
RS
Figure 3. AD5547/AD5557 Timing Diagram




HTML 页

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20 


数据表 下载




链接网址


Privacy Policy
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ]  

关于 Alldatasheet    |   广告服务   |   联系我们   |   隐私政策   |   书签   |   链接交换   |   制造商名单
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl