 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ADSP-21362YSWZ-2AA 数据表(PDF) 1 Page - Analog Devices |
|
||||||||||||||||||||||||||||||
ADSP-21362YSWZ-2AA 数据表(HTML) 1 Page - Analog Devices |
|
|
1 / 56 page  SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc. SHARC Processors ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366 Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2011 All rights reserved. SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data (SIMD) computational architecture On-chip memory—3M bits of on-chip SRAM Code compatible with all other members of the SHARC family The ADSP-2136x processors are available with up to 333 MHz core instruction rate with unique audiocentric peripherals such as the digital applications interface, S/PDIF trans- ceiver, DTCP (digital transmission content protection protocol), serial ports, precision clock generators, and more. For complete ordering information, see Ordering Guide on Page 54. DEDICATED AUDIO COMPONENTS S/PDIF-compatible digital audio receiver/transmitter 8 channels of asynchronous sample rate converters (SRC) 16 PWM outputs configured as four groups of four outputs ROM-based security features include: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios Available in 136-ball CSP_BGA and 144-lead LQFP_EP packages Figure 1. Functional Block Diagram Internal Memory I/F Block 0 RAM/ROM B0D 64-BIT Instruction Cache 5 stage Sequencer PEx PEy PMD 64-BIT Core Bus Cross Bar Block 1 RAM/ROM Block 2 RAM Block 3 RAM DAG1/2 Timer IOD BUS MTM/ DTCP PERIPHERAL BUS 32-BIT Internal Memory DMD 64-BIT PERIPHERAL BUS B1D 64-BIT B2D 64-BIT B3D 64-BIT DAI Peripherals Peripherals SIMD Core S Core Flags SPI PWM 3-0 PP PP Pin MUX PDAP/ IDP7-0 ASRC 3-0 TIMER 2-0 CORE FLAGS S/PDIF Tx/Rx PCG A-B SPI B SPORT 5-0 DAI Routing/Pins IOD 32-BIT FLAGx/IRQx/ TMREXP JTAG PMD 64-BIT DMD 64-BIT |
类似零件编号 - ADSP-21362YSWZ-2AA |
|
类似说明 - ADSP-21362YSWZ-2AA |
|
|
链接网址 |
| 隐私政策 |
| ALLDATASHEETCN.COM |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
