SN54LVTH126, SN74LVTH126

3.3V ABT QUADRUPLE BUS BUFFERS

WITH 3STATE OUTPUTS

SCBS746B − JULY 2000 - REVISED OCTOBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown

resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

FUNCTION TABLE

(each buffer)

INPUTS

OUTPUT

OE

A

OUTPUT

Y

H

H

H

H

LL

L

X

Z

logic diagram (positive logic)

1

1OE

2

1A

1Y

3

4

2OE

5

2A

2Y

6

10

3OE

9

3A

3Y

8

13

4OE

12

4A

4Y

11

Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.