L9D3256M72SBG2 datasheet(61/160 Pages) LODEV

部件名	L9D3256M72SBG2

功能描述	18-20 Gb, DDR3, 256 M x 72/80 Integrated Module

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制造商	LODEV [LOGIC Devices Incorporated]

网页	http://www.logicdevices.com

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LOGIC Devices Incorporated

www.logicdevices.com

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18-20 Gb, DDR3, 256 M x 72/80 Integrated Module

L9D3256M72SBG2

PRELIMINARY INFORMATION

L9D3256M80SBG2

July 24, 2013 LDS-L9D3256MxxSBG2 Rev B

High Performance, Integrated Memory Module Product

FIGURE 26 - NOMINAL SLEW RATE FOR tIH (COMMAND AND ADDRESS – CLOCK)

Notes:

1. Both the clock and the strobe are drawn on different time scales.

VSS

Hol d slew rate

falling signal

Hol d slew rate

rising signal

∆TR

∆TF

=

VDDQ

VIH(AC) MIN

VIH(DC) MIN

VREF(DC)

VIL(DC) MAX

VIL(AC) MAX

Nominal

slew rate

DC to VREF

region

DQS

DQS#

CK#

CK

t IS

t IH

t IS

t IH

DC to VREF

region

Nominal

slew rate

VREF(DC) - VIL(DC) MAX

∆TR

VIH(DC) MIN - V REF(DC)

∆TF

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