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AMC6821SDBQ 数据表(PDF) 4 Page - Texas Instruments |
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AMC6821SDBQ 数据表(HTML) 4 Page - Texas Instruments |
4 / 56 page www.ti.com SDA SCLK S Sr S P t F t F t F t HD:STA t HD:DAT t SU:DAT t SU:STA t BUF t SU:STO t HIGH t LOW t HD:STA t R TIMING REQUIREMENTS AMC6821 SBAS386C – MAY 2006 – REVISED JULY 2007 Figure 1. Timing Specification At VDD = +3V or +5V, and TA = –40°C to +125°C, unless otherwise noted. AMC6821 PARAMETER MIN TYP MAX UNIT fSCLK Clock frequency 100 kHz tBUF Bus free time 4.7 µs tSU:STA Start setup time 4.7 µs tHD:STA Start hold time 4.0 µs tSU:STO Stop condition setup time 4.0 µs tLOW SCLK low time 4.7 µs tHIGH SCLK high time 4.0 µs tR SCLK, SDA rise time 1000 ns tF SCLK, SDA fall time 300 ns tSU:DAT Data setup time 350 ns tHD:DAT Data hold time 350 ns Time from software reset command or power-on to normal operation. During this period, tPOR 1.5 ms I2C™ communication is not recognized. 4 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Link(s): AMC6821 |
类似零件编号 - AMC6821SDBQ |
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类似说明 - AMC6821SDBQ |
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