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AM7968-175JC 数据表(PDF) 10 Page - Advanced Micro Devices |
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AM7968-175JC 数据表(HTML) 10 Page - Advanced Micro Devices |
10 / 127 page AMD 6 Am7968/Am7969 PIN DESCRIPTION Am7968 TAXIchip Transmitter ACK Input-Strobe Acknowledge (TTL Output) ACK High signifies that the Am7968 is ready to accept new Data and Command. The timing of ACK’s response to STRB depends on the condition of the Input Latch (in given CLK cycle). If the Input Latch is empty, data is immediately stored and ACK closely follows STRB. If the Input Latch con- tains previously stored data when STRB is asserted, ACK is delayed until the next falling edge of CLK. Note that for ACK to rise STRB must maintain HIGH for both of the above conditions. CI0 – CI1 Parallel Command In (TTL Inputs) These two inputs accept parallel command information from the host system. If one or more command bits are logic “1”, the command bit pattern is latched, encoded, and transmitted in place of any pattern on the Data inputs. CLK Clock (TTL I/O) CLK is an I/O pin that supplies the byte-rate clock refer- ence to drive all internal logic. When TLS is connected to ground (Local mode), CLK is enabled as a free-running (byte-rate) clock output which runs at the Crystal Oscil- lator frequency; this output can be used to drive the X1 input of TAXIchip Receivers or other system logic. In Test mode CLK becomes an input. In Test Mode 1 CLK is a Byte rate input and in Test Mode 2 it is a Bit rate input. DI0 – DI7 Parallel Data In (TTL Inputs) These eight inputs accept parallel data from the host system, to be latched, encoded and transmitted. DI8/CI3 Parallel Data (8) In or Command (3) In (TTL Input) DI 8/CI3 input is either Data or Command, depending upon the state of DMS . DI9/CI2 Parallel Data (9) In or Command (2) In (TTL Input) DI 9/CI2 input is either Data or Command, depending upon the state of DMS . DMS Data Mode Select (Input) Data Mode Select input determines the Data pattern width. When it is wired to GND, the Am7968 Transmitter will assume Data to be eight bits wide, with four bits of Command. When it is wired to V CC, the Am7968 Transmitter will assume Data to be nine bits wide, with three bits of Command. If DMS is left floating (or termi- nated to 1/2 V CC), the Am7968 will assume Data to be ten bits wide, with two bits of Command. GND1, GND2 Ground Pins GND1 is a TTL I/O Ground and GND2 is an internal Logic and Analog Ground. RESET PLL RESET (Input) This pin is normally left open, but can be momentarily grounded to force the internal PLL to reactivate lock. This allows for correction in the unlikely occurrence of PLL lockup on application of power. RESET has an internal pull-up resistor which causes it to float high when left unconnected (50 K ohm nominal). If this board is driven by a board Reset signal, an open drain (or open collector) style output should be used to insure the High level signal is at VCC. SEROUT+, SEROUT– Differential Serial Data Out (Differential Open Emit- ter ECL Outputs) These differential ECL outputs generate data at ECL voltage levels referenced to +5.0 V. When connected to appropriated pull down resistors, they are capable of driving 50- Ω terminated lines, either directly or through isolating capacitors. STRB Input Strobe Signal (TTL Input) A rising edge on the STRB input causes the Data (DI0 – DI9) or the Command (CI0 – CI3) inputs to be latched into the Am7968 Transmitter. The STRB signal is nor- mally taken LOW after ACK has risen. TLS Test/Local Select (Input) TLS input determines the mode of operation. When TLS is wired to GND, the Am7968 Transmitter assumes a Local mode connection to the media. It will output NRZI encoded data, and will enable its CLK output driver. The TLS pin should always be grounded during normal operation. When TLS is wired to V CC (Test Mode 1),the serial data is NRZ, CLK becomes an input, and ACK timing is modi- fied. This mode is only used for Automatic Test Equip- ment (ATE) testing at full speed. When this input is left unconnected, it floats to an inter- mediate level which puts the Am7968 Transmitter into its Test Mode 2. In Test Mode 2, the internal clock |
类似零件编号 - AM7968-175JC |
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类似说明 - AM7968-175JC |
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