AD538

Rev. E | Page 10 of 16

FUNCTIONAL DESCRIPTION

connect directly to the input log ratio amplifiers of the AD538.

This subsection provides an output voltage proportional to the

expressed by the transfer function













=

X

Z

B

V

V

q

kT

V

ln

where:

T is in Kelvins.

The log ratio configuration may be used alone, if correctly

temperature compensated and scaled to the desired output

level (see the Applications Information section).

Under normal operation, the log-ratio output will be directly

connected to a second functional block at Input C, the antilog

subsection. This section performs the antilog according to the

transfer function:













=

kT

q

V

e

V

V

C

Y

O

As with the log-ratio circuit included in the AD538, the user

may use the antilog subsection by itself. When both subsections

are combined, the output at B is tied to C, the transfer function

of the AD538 computational unit is:

C

B

V

V

kT

q

Q

kT

V

V

X

Z

=





















































;

ln

which reduces to:













=

X

Z

Y

O

V

V

V

V

Finally, by increasing the gain, or attenuating the output of the

log ratio subsection via resistor programming, it is possible to

programming, m is unity. Thus, the overall AD538 transfer

function equals:

m

X

Z

Y

O

V

V

V

V













=

where 0.2 < m < 5.

is already in the log domain.

STABILITY PRECAUTIONS

At higher frequencies, the multistaged signal path of the AD538

can result in large phase shifts (as illustrated in Figure 11). If a

condition of high incremental gain exists along that path (for

Appropriate care should be exercised in board layout to prevent

capacitive feedback mechanisms under these conditions.

Ln Y

Ln Z

Ln X

Σ

Σ

BUFFER

+

+

+

–

Ln Z – Ln X

M(Ln Z – Ln X)

M(Ln Z – Ln X) +Ln Y

0.2

≤M≤5

M

Figure 11. Model Circuit

USING THE VOLTAGE REFERENCES

A stable band gap voltage reference for scaling is included in the

AD538. It is laser-trimmed to provide a selectable voltage output of

+10 V buffered (Pin 4), +2 V unbuffered (Pin 5) or any voltages

between +2 V and +10.2 V buffered as shown in Figure 12. The

output impedance at Pin 5 is approximately 5 kΩ. Note that any

loading of this pin produces an error in the +10 V reference

voltage. External loads on the +2 V output should be greater

than 500 kΩ to maintain errors less than 1%.

25k

Ω

25k

Ω

100

Ω

25k

Ω

25k

Ω

ANTILOG

LOG

OUTPUT

100

Ω

50k

Ω

+2V TO +10.2V

BUFFERED

11.5k

Ω

AD538

A

D

C

8

1

1

17

16

15

14

13

12

11

10

2

3

4

5

6

7

8

9

LOG

RATIO

INTERNAL

VOLTAGE

REFERENCE

SIGNAL

GND

PWR

GND

I

B

REF OUT

+2V

Figure 12. +2 V to +10.2 V Adjustable Reference

In situations not requiring both reference levels, the +2 V output

can be converted to a buffered output by tying Pin 4 and Pin 5

together. If both references are required simultaneously, the

+10 V output should be used directly and the +2 V output

should be externally buffered.