AD7729AR datasheet(2/16 Pages) AD

部件名	AD7729AR

功能描述	Dual Sigma-Delta ADC with Auxiliary DAC

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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–2–

REV. 0

AD7729–SPECIFICATIONS1

Parameter

AD7729A

Units

Test Conditions/Comments

REFERENCE

REFCAP

Absolute Voltage, VREFCAP

1.3

± 5%

V min/max

REFCAP TC

50

ppm/

°C typ

0.1

µF Capacitor Required from REFCAP to AGND

REFOUT

Absolute Voltage, VREFOUT

1.3

± 10%

V min/max

REFOUT TC

50

ppm/

°C typ

0.1

µF Capacitor Required from REFOUT to AGND

ADC CHANNEL SPECIFICATIONS

RxON = 1

Resolution

15

Bits

ADC Signal Range

2 VREFCAP

V p-p

VBIAS

VREFCAP/2 to (AVDD – VREFCAP/2)

Volts

Differential

VREFCAP to (AVDD – VREFCAP)

Volts

Single-Ended

Differential Signal Range

VBIAS ± VREFCAP/2

V min/max

For Both Positive and Negative Analog Inputs

Single-Ended Signal Range

VBIAS ± VREFCAP

V min/max

For Positive Analog Inputs; Negative Analog Inputs = VBIAS

Input Sample Rate

13

MSPS

Output Word Rate

270.83

kHz

DC Accuracy

Precalibration Offset Error

±45

mV typ

Post Calibration Offset Error

±10

mV max

Post Calibration Offset Error TC

50

µV/°C typ

TC = Temperature Coefficient

Input Resistance (DC)

1.23

M

Ω typ

Input Capacitance

10

pF typ

Dynamic Specifications

Input Frequency = 67.7 kHz

Dynamic Range

67

dB typ

Signal to (Noise + Distortion)

64

dB min

Gain Error

±1

dB max

Input Frequency = 67.7 kHz, wrt 1.3 V

±0.5

dB max

Input Frequency = 67.7 kHz, wrt VREFCAP

Gain Match Between Channels

±0.2

dB max

Filter Settling Time

47

µs typ

Frequency Response

Does Not Include Input Antialias RC Circuit

0 kHz –70 kHz

±0.05

dB max/min

85 kHz

–1

dB max

96 kHz

–3.0

dB max

135 kHz

–55

dB max

>170 kHz

–55

dB max

Absolute Group Delay

23

µs typ

Group Delay Between Channels

(0 kHz–96 kHz)

5

ns typ

Coding

Twos Complement

AUXILIARY CONVERTER2

Resolution

10

Bits

Output Range

Code 000

2/32

× V

REFCAP

V

Offset Error

±35

mV max

Code 3FF

2 VREFCAP

V

Gain Error

–60

mV min

+100

mV max

DC Accuracy

Maximum Output for Specified Accuracy = AVDD –

0.2 V or 2.6 V, Whichever Is Lower

Integral Nonlinearity

±4

LSB max

Differential Nonlinearity

±2

LSB max

Guaranteed Monotonic to 9 Bits

Update Rate

540

kHz max

Load Resistance

10

k

Ω min

See Figure 1

Load Capacitance

50

pF max

See Figure 1

ISINK

50

µA typ

Full-Scale Settling Time

4

µs typ

LSB Settling Time

2

µs typ

Coding

Binary

(AVDD1 = AVDD2 = +3 V

10%; DVDD1 = DVDD2 = +3 V

10%; DGND = AGND =

0 V, fCLK = 13 MHz; RxPOWER1 = 0; RxPOWER0 = 1; MCLKDIV = 0; TA = TMIN to TMAX unless otherwise noted)

类似零件编号 - AD7729AR

制造商	部件名	数据表	功能描述
Analog Devices	AD7729AR	142Kb / 16P	Dual Sigma-Delta ADC with Auxiliary DAC REV. 0
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