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SMP04GBC 数据表(PDF) 2 Page - Analog Devices

部件名 SMP04GBC
功能描述  CMOS Quad Sample-and-Hold Amplifier
Download  15 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SMP04GBC 数据表(HTML) 2 Page - Analog Devices

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SMP04–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Linearity Error
0.01
%
Buffer Offset Voltage
VOS
VIN = 6 V
–10
±2.5
+10
mV
Hold Step
VHS
VIN = 6 V, TA = +25°C to +85°C2.5
4
mV
VIN = 6 V, TA = –40°C5
mV
Droop Rate
∆V/∆tV
IN = 6 V, TA = +25°C
2
25
mV/s
Output Source Current
1
ISOURCE
VIN = 6 V
1.2
mA
Output Sink Current
1
ISINK
VIN = 6 V
0.5
mA
Output Voltage Range
OVR
RL = 20 kΩ
0.06
10.0
V
RL = 10 kΩ
0.06
9.5
V
LOGIC CHARACTERISTICS
Logic Input High Voltage
VINH
2.4
V
Logic Input Low Voltage
VINL
0.8
V
Logic Input Current
IIN
0.5
1
µA
DYNAMIC PERFORMANCE
2
Acquisition Time
3
tAQ
TA = +25°C, 0 V to 10 V Step to 0.1%
3.5
4.25
µs
–40
°C ≤ T
A ≤ +85°C
3.75
5.25
µs
Acquisition Time
3
tAQ
TA = +25°C, 0 V to 10 V Step to 0.01%
9
µs
Hold Mode Settling Time
tH
To 1 mV
1
µs
Slew Rate
4
SR
RL = 20 kΩ
34
V/
µs
Capacitive Load Stability
CL
<30% Overshoot
500
pF
Analog Crosstalk
0 V to 10 V Step
–80
dB
SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio
PSRR
10.8 V
≤ V
DD ≤ 13.2 V
60
75
dB
Supply Current
IDD
47
mA
Power Dissipation
PDIS
84
mW
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Linearity Error
0.01
%
Buffer Offset Voltage
VOS
VIN = 0 V
–10
±2.5
+10
mV
Hold Step
VHS
VIN = 0 V, TA = +25°C to +85°C2.5
4
mV
VIN = 0 V, TA = –40°C5
mV
Droop Rate
∆V/∆tV
IN = 0 V, TA = +25
°C
2
25
mV/s
Output Resistance
ROUT
1
Output Source Current
1
ISOURCE
VIN = 0 V
1.2
mA
Output Sink Current
1
ISINK
VIN = 0 V
0.5
mA
Output Voltage Range
OVR
RL = 20 kΩ
–3.0
+3.0
V
LOGIC CHARACTERISTICS
Logic Input High Voltage
VINH
2.4
V
Logic Input Low Voltage
VINL
0.8
V
Logic Input Current
IIN
0.5
1
µA
DYNAMIC PERFORMANCE
2
Acquisition Time
3
tAQ
–3 V to +3 V Step to 0.1%
3.6
11
µs
Acquisition Time
3
tAQ
–3 V to +3 V Step to 0.01%
9
µs
Hold Mode Settling Time
tH
To 1 mV
1
µs
Slew Rate
5
SR
RL = 20 kΩ
3V/
µs
Capacitive Load Stability
CL
<30% Overshoot
500
pF
SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio
PSRR
±5 V ≤ V
DD ≤ ± 6 V
60
75
dB
Supply Current
IDD
3.5
5.5
mA
Power Dissipation
PDIS
55
mW
NOTES
1Outputs are capable of sinking and sourcing over 20 mA, but linearity and offset are guaranteed at specified load levels.
2All input control signals are specified with t
R = tF = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
3This parameter is guaranteed without test.
4Slew rate is measured in the sample mode with a 0 V to 10 V step from 20% to 80%.
5Slew rate is measured in the sample mode with a –3 V to +3 V step from 20% to 80%.
Specifications are subject to change without notice.
REV. D
–2–
(@ VDD = +12.0 V, VSS = DGND = 0 V, RL = No Load, TA = Operating Temperature Range
specified in Absolute Maximum Ratings, unless otherwise noted.)
(@ VDD = +5.0 V, VSS = –5.0 V, DGND = 0.0 V, RL = No Load, TA = Operating Temperature
Range specified in Absolute Maximum Ratings, unless otherwise noted.)


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