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EPM7064S 数据表(PDF) 13 Page - Altera Corporation

部件名 EPM7064S
功能描述  Programmable Logic Device Family
Download  66 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EPM7064S 数据表(HTML) 13 Page - Altera Corporation

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Altera Corporation
13
MAX 7000 Programmable Logic Device Family Data Sheet
The compiler can allocate up to three sets of up to five parallel expanders
automatically to the macrocells that require additional product terms.
Each set of five parallel expanders incurs a small, incremental timing
delay (tPEXP). For example, if a macrocell requires 14 product terms, the
Compiler uses the five dedicated product terms within the macrocell and
allocates two sets of parallel expanders; the first set includes five product
terms and the second set includes four product terms, increasing the total
delay by 2 × tPEXP.
Two groups of 8 macrocells within each LAB (e.g., macrocells
1 through 8 and 9 through 16) form two chains to lend or borrow parallel
expanders. A macrocell borrows parallel expanders from lower-
numbered macrocells. For example, macrocell 8 can borrow parallel
expanders from macrocell 7, from macrocells 7 and 6, or from macrocells
7, 6, and 5. Within each group of 8, the lowest-numbered macrocell can
only lend parallel expanders and the highest-numbered macrocell can
only borrow them. Figure 6 shows how parallel expanders can be
borrowed from a neighboring macrocell.
Figure 6. Parallel Expanders
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
Preset
Clock
Clear
Product-
Term
Select
Matrix
Preset
Clock
Clear
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
From
Previous
Macrocell
To Next
Macrocell
Macrocell
Product-
Term Logic
36 Signals
from PIA
16 Shared
Expanders


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