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RC5061 数据表(PDF) 4 Page - Fairchild Semiconductor |
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RC5061 数据表(HTML) 4 Page - Fairchild Semiconductor |
4 / 18 page RC5061 PRODUCT SPECIFICATION 4 REV. 1.0.0 7/6/00 Notes: 1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is measured at the converter’s VFB sense point. 2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than 0.5m Ω trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal performance. 3. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with Intel’s VRM 8.4 specification of +50, –80mV. If Intel specifications on maximum plane resistance from the converter’s output capacitors to the CPU are met, the specification of +40, –70mV at the capacitors will also be met. Duty Cycle 0 100 % 5V UVLO • 3.74 4 4.26 V 12V UVLO • 7.65 8.5 9.35 V Soft Start Current • 5 10 17 µA VTT Linear Regulator Output Voltage ILOAD ≤ 2A • 1.455 1.5 1.545 V Under Voltage Trip Level Over Current 80 %VO VCLK Linear Regulator Output Voltage ILOAD ≤ 2A • 2.375 2.5 2.625 V Under Voltage Trip Level Over Current 80 %VO Common Functions Oscillator Frequency • 255 310 345 kHz PWRGD Threshold Logic HIGH, All Outputs Logic LOW, Any Output • • 92 88 108 112 %VOUT Linear Regulator Under Voltage Delay Time Over Current 30 µsec Electrical Specifications (Continued) (VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1 unless otherwise noted.) The • denotes specifications which apply over the full operating temperature range. Parameter Conditions Min. Typ. Max. Units |
类似零件编号 - RC5061 |
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类似说明 - RC5061 |
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