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AD7874SE3 数据表(PDF) 4 Page - Analog Devices |
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AD7874SE3 数据表(HTML) 4 Page - Analog Devices |
4 / 16 page AD7874 REV. C –4– TERMINOLOGY ACQUISITION TIME Acquisition Time is the time required for the output of the track/hold amplifiers to reach their final values, within ±1/2 LSB, after the falling edge of INT (the point at which the track/ holds return to track mode). This includes switch delay time, slewing time and settling time for a full-scale voltage change. APERTURE DELAY Aperture Delay is defined as the time required by the internal switches to disconnect the hold capacitors from the inputs. This produces an effective delay in sample timing. It is measured by applying a step input and adjusting the CONVST input position until the output code follows the step input change. APERTURE DELAY MATCHING Aperture Delay Matching is the maximum deviation in aperture delays across the four on-chip track/hold amplifiers. APERTURE JITTER Aperture Jitter is the uncertainty in aperture delay caused by internal noise and variation of switching thresholds with signal level. DROOP RATE Droop Rate is the change in the held analog voltage resulting from leakage currents. CHANNEL-TO-CHANNEL ISOLATION Channel-to-Channel Isolation is a measure of the level of crosstalk between channels. It is measured by applying a full- scale 1 kHz signal to the other three inputs. The figure given is the worst case across all four channels. SNR, THD, IMD See DYNAMIC SPECIFICATIONS section. PIN CONFIGURATIONS DIP and SOIC V IN1 V IN2 V IN4 V IN3 REF IN AGND DB0 (LSB) V DD V SS REF OUT CLK DB1 V DD DB2 DB11 (MSB) DB3 DB10 DB4 DB9 DB5 DB8 DB6 DGND DB7 13 18 1 2 28 27 5 6 7 24 23 22 3 4 26 25 821 920 10 19 11 11 12 17 16 14 15 TOP VIEW (Not to Scale) AD7874 INT CONVST RD CS LCCC V DD CLK REF OUT REF IN DB1 AGND DB0 (LSB) DB10 DB11 (MSB) DB3 DB2 AD7874 27 1 28 226 3 4 25 22 24 23 21 19 20 18 17 12 13 16 14 15 11 10 9 8 7 6 5 TOP VIEW (Not to Scale) CONVST RD CS |
类似零件编号 - AD7874SE3 |
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类似说明 - AD7874SE3 |
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