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LT1931 数据表(PDF) 6 Page - Linear Technology |
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LT1931 数据表(HTML) 6 Page - Linear Technology |
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6 / 12 page  6 LT1931/LT1931A 1931fa APPLICATIO S I FOR ATIO The inductors shown in Table 2 for use with the LT1931A were chosen for their small size. For better efficiency, use similar valued inductors with a larger volume. For in- stance, the Sumida CR43 series, in values ranging from 3.3 µH to 10µH, will give a LT1931A application a few percentage points increase in efficiency. CAPACITOR SELECTION Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X5R dielectrics are preferred, followed by X7R, as these materials retain their capacitance over wide voltage and temperature ranges. A 10 µF to 22µF output capacitor is sufficient for most LT1931 applications while a 4.7 µF to 10µF capacitor will suffice for the LT1931A. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a sufficient voltage rating. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the LT1931/LT1931A. A 1 µF to 4.7µF input capacitor is sufficient for most applications. Table 3 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. Table 3. Ceramic Capacitor Manufacturers Taiyo Yuden (408) 573-4150 www.t-yuden.com AVX (803) 448-9411 www.avxcorp.com Murata (714) 852-2001 www.murata.com The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors can effect the stability of the overall system. The ESR of any capacitor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OS-CON capaci- tors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor (C4) in parallel with the resistor (R1) between VOUT and VNFB as shown in Figure 1. The frequency of the zero is determined by the following equation. ƒ= π Z RC 1 21 4 •• By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 20kHz to 60kHz. Figure 3 shows the transient response of the inverting converter from Figure 1 without the phase lead capacitor C4. The phase margin is reduced as evidenced by more ringing in both the output voltage and inductor current. A 220pF capacitor for C4 results in better phase margin, which is revealed in Figure 4 as a more damped response and less overshoot. Figure 5 shows the transient response when a 22 µF tantalum capacitor with no phase lead capacitor is used on the output. The higher output voltage ripple is revealed in the upper waveform as a thicker line. The transient response is adequate which implies that the ESR zero is improving the phase margin. VOUT 20mV/DIV AC COUPLED IL1A + IL1B 0.5A/DIV AC COUPLED 200mA 100mA LOAD CURRENT 100 µs/DIV 1931 F03 Figure 3. Transient Response of Inverting Converter Without Phase Lead Capacitor |
类似零件编号 - LT1931 |
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类似说明 - LT1931 |
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