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AD7723BSZ1 数据表(PDF) 4 Page - Analog Devices |
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AD7723BSZ1 数据表(HTML) 4 Page - Analog Devices |
4 / 32 page AD7723 Rev. C | Page 4 of 32 B Version Parameter Test Conditions/Comments Min Typ Max Unit Low-Pass Decimate by 16 0 kHz to fCLKIN/41.75 ±0.001 dB fCLKIN/33.45 −3 dB fCLKIN/32 −6 dB fCLKIN/25.95 to fCLKIN/2 −90 dB Group Delay 541/2 fCLKIN Settling Time 541/fCLKIN Band-Pass Decimate by 32 fCLKIN/51.90 to fCLKIN/41.75 ±0.001 dB fCLKIN/62.95, fCLKIN/33.34 −3 dB fCLKIN/64, fCLKIN/32 −6 dB 0 kHz to fCLKIN/83.5, fCLKIN/25.95 to fCLKIN/2 −90 dB Group Delay 1293/2 fCLKIN Settling Time 1293/fCLKIN Output Data Rate, FO Decimate by 32 fCLKIN/32 Decimate by 166 fCLKIN/16 ANALOG INPUTS Full-Scale Input Span VIN(+) − VIN(−) Bipolar Mode ±4/5 × VREF2 V Unipolar Mode 0 8/5 × VREF2 V Absolute Input Voltage VIN(+) − VIN(−) AGND AVDD V Input Sampling Capacitance 2 pF Input Sampling Rage, fCLKIN 19.2 MHz CLOCK CLKIN Duty Ratio 45 55 % REFERENCE REF1 Output Resistance 3 kΩ Using Internal Reference REF2 Output Voltage 2.39 2.54 2.69 V REF2 Output Voltage Drift 60 ppm/°C Using External Reference REF2 Input Impedance REF1 = AGND 4 kΩ REF2 External Voltage Range 1.2 2.5 3.15 V STATIC PERFORMANCE Resolution 16 Bits Differential Nonlinearity Guaranteed monotonic ±0.5 ±1 LSB Integral Nonlinearity ±2 LSB DC CMRR 80 dB Offset Error ±20 mV Gain Error5 ±0.5 % FSR LOGIC INPUTS (EXCLUDING CLKIN) VINH, Input High Voltage 2.0 V VINL, Input High Voltage 0.8 V CLOCK INPUT (CLKIN) VINH, Input High Voltage 3.8 V VINL, Input High Voltage 0.4 V ALL LOGIC INPUTS IIN, Input Current VIN = 0 V to DVDD ±10 µA CIN, Input Capacitance 10 pF |
类似零件编号 - AD7723BSZ1 |
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类似说明 - AD7723BSZ1 |
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