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AD2S80ASE 数据表(PDF) 11 Page - Analog Devices

部件名 AD2S80ASE
功能描述  Variable Resolution, Monolithic Resolver-to-Digital Converter
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD2S80ASE 数据表(HTML) 11 Page - Analog Devices

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AD2S80A
REV. B
–11–
for sinusoidal signals in phase or antiphase with the reference
(for a square wave the DEMODULATOR OUTPUT voltage
will equal the DEMODULATOR INPUT). This provides a
signal at the DEMODULATOR OUTPUT which is a dc level
proportional to the positional error of the converter.
DC Error Scaling = 160 mV/bit (10 bits resolution)
= 40 mV/bit (12 bits resolution)
= 10 mV/bit (14 bits resolution)
= 2.5 mV/bit (16 bits resolution)
When the tracking loop is closed, this error is nulled to zero
unless the converter input angle is accelerating.
Integrator
The integrator components (R4, C4, R5, C5) are external to the
AD2S80A to allow the user to determine the optimum dynamic
characteristics for any given application. The section “COMPO-
NENT SELECTION” explains how to select components for a
chosen bandwidth.
Since the output from the integrator is fed to the VCO INPUT,
it is proportional to velocity (rate of change of output angle) and
can be scaled by selection of R6, the VCO input resistor. This is
explained in the section “VOLTAGE CONTROLLED OSCIL-
LATOR (VCO)” below.
To prevent the converter from “flickering” (i.e., continually
toggling by
±1 bit when the quantized digital angle, φ, is not an
exact representation of the input angle,
θ) feedback is internally
applied from the VCO to the integrator input to ensure that the
VCO will only update the counter when the error is greater than
or equal to 1 LSB. In order to ensure that this feedback “hys-
teresis” is set to 1 LSB the input current to the integrator must
be scaled to be 100 nA/bit. Therefore,
R4
=
DC Error Scaling (mV /bit )
100 (nA /bit )
Any offset at the input of the integrator will affect the accuracy
of the conversion as it will be treated as an error signal and
offset the digital output. One LSB of extra error will be added
for each 100 nA of input bias current. The method of adjusting out
this offset is given in the section “COMPONENT SELECTION.”
Voltage Controlled Oscillator
(VCO)
The VCO is essentially a simple integrator feeding a pair of dc
level comparators. Whenever the integrator output reaches one
of the comparator threshold voltages, a fixed charge is injected
into the integrator input to balance the input current. At the
same time the counter is clocking either up or down, dependent
on the polarity of the input current. In this way the counter is
clocked at a rate proportional to the magnitude of the input
current of the VCO.
During the reset period the input continues to be integrated, the
reset period is constant at 400 ns.
The VCO rate is fixed for a given input current by the VCO
scaling factor:
= 7.9 kHz/
µA
The tracking rate in rps per
µA of VCO input current can be
found by dividing the VCO scaling factor by the number of LSB
changes per rev (i.e., 4096 for 12-bit resolution).
The input resistor R6 determines the scaling between the con-
verter velocity signal voltage at the INTEGRATOR OUTPUT
pin and the VCO input current. Thus to achieve a 5 V output at
100 rps (6000 rpm) and 12-bit resolution the VCO input cur-
rent must be:
(100
× 4096)/(7900) = 51.8 µA
Thus, R6 would be set to: 5/(51.8
× 10–6) = 96 kΩ
The velocity offset voltage depends on the VCO input resistor,
R6, and the VCO bias current and is given by
Velocity Offset Voltage = R6
× (VCO bias current)
The temperature coefficient of this offset is given by
Velocity Offset Tempco = R6
× (VCO bias current tempco)
where the VCO bias current tempco is typically –1.22 nA/
°C.
The maximum recommended rate for the VCO is 1.1 MHz
which sets the maximum possible tracking rate.
Since the minimum voltage swing available at the integrator
output is
±8 V, this implies that the minimum value for R6 is
57 k
Ω. As
Max Current
A
MinValue R
k
=
×
×
=
=
×
=Ω
11 10
79 10
139
6
8
139 10
57
6
3
6
.
.
µ
Transfer Function
By selecting components using the method outlined in the sec-
tion “Component Selection,” the converter will have a critically
damped time response and maximum phase margin. The
Closed-Loop Transfer Function is given by:
θ
OUT
θ
IN
=
14 (1
+ s
N )
(sN
+2.4)(s
N
2 + 3.4 s
N
+5.8)
where, sN, the normalized frequency variable is:
sN
=
2
π
s
f BW
and fBW is the closed-loop 3 dB bandwidth (selected by the
choice of external components).
The acceleration KA, is given approximately by
K
A = 6 × ( f BW )
2
sec
–2
The normalized gain and phase diagrams are given in Figures 4
and 5.


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