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AD7741BRZ 数据表(PDF) 5 Page - Analog Devices |
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AD7741BRZ 数据表(HTML) 5 Page - Analog Devices |
5 / 12 page REV. 0 AD7741/AD7742 –5– AD7741 PIN FUNCTION DESCRIPTION Pin No. Mnemonic Function 1VDD Power Supply Input. These parts can be operated from +4.75 V to +5.25 V and the supply should be adequately decoupled to GND. 2 GND Ground reference point for all circuitry on the part. 3 CLKOUT External Clock Output. When the master clock for the device is a crystal, the crystal is connected between CLKIN and CLKOUT. When an external clock is applied to CLKIN, the CLKOUT pin provides an inverted clock signal. This clock should be buffered if it is to be used as a clock source elsewhere in the system. 4 CLKIN External Clock Input. The master clock for the device can be provided in the form of a crystal or an external clock. A crystal may be tied across the CLKIN and CLKOUT pins. Alternatively, the CLKIN pin may be driven by a CMOS-compatible clock and CLKOUT left unconnected. The frequency of the master clock may be as high as 6 MHz. 5 REFIN/OUT This is the reference input to the core of the VFC and defines the span of the VFC. If this pin is left unconnected, the internal 2.5 V reference is used. Alternatively, a precision external reference (e.g., REF192) may be used to overdrive the internal reference. The internal bandgap reference has a high output impedance in order to allow it to be overdriven. 6VIN The analog input to the VFC. It has an input range from 0 V to VREF. This input is buffered so it draws virtually no current from whatever source is driving it. 7 PD Active Low Power-Down pin. When this input is low, the part enters power-down mode where it typically consumes 15 µA of current. 8fOUT Frequency Output. This pin provides the output of the synchronous VFC. PIN CONFIGURATION TOP VIEW (Not to Scale) 8 7 6 5 1 2 3 4 VDD fOUT AD7741 GND PD CLKOUT VIN CLKIN REFIN/OUT |
类似零件编号 - AD7741BRZ |
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类似说明 - AD7741BRZ |
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