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AD7533ACHIPS 数据表(PDF) 7 Page - Analog Devices |
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AD7533ACHIPS 数据表(HTML) 7 Page - Analog Devices |
7 / 12 page AD7533 Rev. C | Page 7 of 12 CIRCUIT DESCRIPTION GENERAL CIRCUIT INFORMATION The AD7533 is a 10-bit multiplying DAC that consists of a highly stable thin-film R-2R ladder and ten CMOS current switches on a monolithic chip. Most applications require the addition of only an output operational amplifier and a voltage or current reference. The simplified D/A circuit is shown in Figure 7. An inverted R- 2R ladder structure is used, that is, the binarily weighted currents are switched between the IOUT1 and IOUT2 bus lines, thus maintaining a constant current in each ladder leg independent of the switch state. 20kΩ S1 S2 S3 SN IOUT2 VREF IOUT1 RFB 20kΩ 20kΩ 20kΩ 10kΩ BIT 1 (MSB) BIT 10 (LSB) DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE) BIT 2 BIT 3 10kΩ 10kΩ 10kΩ 20kΩ Figure 7. Functional Diagram One of the CMOS current switches is shown in Figure 8. The geometries of Device 1, Device 2, and Device 3 are optimized to make the digital control inputs DTL/TTL/CMOS compatible over the full military temperature range. The input stage drives two inverters (Device 4, Device 5, Device 6, and Device 7), which in turn drive the two output N channels. The on resistances of the switches are binarily sealed so that the voltage drop across each switch is the same. For example, Switch 1 in Figure 8 is designed for an on resistance of 20 Ω, Switch 2 for 40 Ω, and so on. For a 10 V reference input, the current through Switch 1 is 0.5 mA, the current through Switch 2 is 0.25 mA, and so on, thus maintaining a constant 10 mV drop across each switch. It is essential that each switch voltage drop be equal if the binarily weighted current division property of the ladder is to be maintained. DTL/TTL/ CMOS INPUT V+ 13 2 TO LADDER 5 4 250Ω 7 6 89 IOUT1 IOUT2 Figure 8. CMOS Switch EQUIVALENT CIRCUIT ANALYSIS The equivalent circuits for all digital inputs high and digital inputs low are shown in Figure 9 and Figure 10. In Figure 9 with all digital inputs low, the reference current is switched to IOUT2. The current source ILEAKAGE is composed of surface and junction leakages to the substrate, while the I/1024 current source represents a constant 1-bit current drain through the termination resistor on the R-2R ladder. The on capacitance of the output N channel switch is 100 pF, as shown on the IOUT2 terminal. The off switch capacitance is 35 pF, as shown on the IOUT1 terminal. Analysis of the circuit for all digital inputs high, as shown in Figure 10, is similar to Figure 9; however, the on switches are now on Terminal IOUT1. Therefore, there is the 100 pF at that terminal. IOUT2 IOUT1 VREF IREF RFB ILEAKAGE R R R 10kΩ 100pF ILEAKAGE 35pF I/1024 Figure 9. Equivalent Circuit—All Digital Inputs Low IOUT2 IOUT1 VREF IREF RFB ILEAKAGE R R 100pF ILEAKAGE 35pF I/1024 R 10kΩ Figure 10. Equivalent Circuit—All Digital Inputs High |
类似零件编号 - AD7533ACHIPS |
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类似说明 - AD7533ACHIPS |
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