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EP2AGX45DF25I3N 数据表(PDF) 73 Page - Altera Corporation |
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EP2AGX45DF25I3N 数据表(HTML) 73 Page - Altera Corporation |
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73 / 78 page  Chapter 1: Device Datasheet for Arria II Devices 1–73 I/O Timing July 2012 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum I/O Timing Altera offers two ways to determine I/O timing: ■ Using the Microsoft Excel-based I/O Timing. ■ Using the Quartus II Timing Analyzer. The Microsoft Excel-based I/O Timing provides pin timing performance for each device density and speed grade. The data is typically used prior to designing the FPGA to get an estimate of the timing budget as part of the link timing analysis. The Quartus II timing analyzer provides a more accurate and precise I/O timing data based on the specifics of the design after place-and-route is complete. f The Microsoft Excel-based I/O Timing spreadsheet is downloadable from the Literature: Arria II Devices web page. |
类似零件编号 - EP2AGX45DF25I3N |
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类似说明 - EP2AGX45DF25I3N |
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