EP4SE530F35I4 datasheet(48/432 Pages) ALTERA

部件名	EP4SE530F35I4

功能描述	This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

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制造商	ALTERA [Altera Corporation]

网页	http://www.altera.com

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Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices

Adaptive Logic Modules

Stratix IV Device Handbook

February 2011

Altera Corporation

Volume 1

Arithmetic Mode

Arithmetic mode is ideal for implementing adders, counters, accumulators, wide

parity functions, and comparators. The ALM in arithmetic mode uses two sets of

2 four-input LUTs along with two dedicated full adders. The dedicated adders allow

the LUTs to be available to perform pre-adder logic; therefore, each adder can add the

output of 2 four-input functions.

The four LUTs share dataa and datab inputs. As shown in Figure 2–10, the carry-in

signal feeds to adder0 and the carry-out from adder0 feeds to the carry-in of adder1.

The carry-out from adder1 drives to adder0 of the next ALM in the LAB. ALMs in

arithmetic mode can drive out registered and/or unregistered versions of the adder

outputs.

While operating in arithmetic mode, the ALM can support simultaneous use of the

adder’s carry output along with combinational logic outputs. In this operation, adder

output is ignored. Using the adder with combinational logic output provides resource

savings of up to 50% for functions that can use this ability.

Arithmetic mode also offers clock enable, counter enable, synchronous up/down

control, add/subtract control, synchronous clear, and synchronous load. The LAB

local interconnect data inputs generate the clock enable, counter enable, synchronous

up/down, and add/subtract control signals. These control signals are good

candidates for the inputs that are shared between the four LUTs in the ALM. The

synchronous clear and synchronous load options are LAB-wide signals that affect all

registers in the LAB. These signals can also be individually disabled or enabled per

register. The Quartus II software automatically places any registers that are not used

by the counter into other LABs.

Figure 2–10. ALM in Arithmetic Mode

datae0

carry_in

carry_out

dataa

datab

datac

datad

datae1

DQ

To general or

local routing

To general or

local routing

reg0

reg1

To general or

local routing

To general or

local routing

4-Input

LUT

4-Input

LUT

4-Input

LUT

4-Input

LUT

adder1

adder0

dataf0

dataf1

类似零件编号 - EP4SE530F35I4

制造商	部件名	数据表	功能描述
Altera Corporation	EP4SE530	407Kb / 40P	Stratix IV Device

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