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MC3PHACVP 数据表(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC3PHACVP 数据表(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 36 page MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2 10 Freescale Semiconductor Features Figure 4. Dynamic Bus Ripple Cancellation In standalone mode, the base frequency and PWM polarity are specified at the same time during initialization by connecting either pin 25, 26, 27, or 28 exclusively to the PWMPOL_BASEFREQ input. During initialization, pins 25, 26, 27, and 28 are cycled one at a time to determine which one has been connected to the PWMPOL_BASEFREQ input. Table 3 shows the selected PWM polarity and base frequency as a function of which pin connection is made. Refer to the standalone mode schematic, Figure 8. Only one of these jumpers (JP1–JP4) can be connected at any one time. NOTE It is not necessary to break this connection once the initialization phase has been completed. The MC3PHAC will function properly while this connection is in place. Table 3. PWM Polarity and Base Frequency Specification in Standalone Mode Pin Connected to PWMPOL_BASEFREQ Pin PWM Polarity Base Frequency MUX_IN (JP1) Logic low = on 50 Hz SPEED (JP2) Logic high = on 50 Hz ACCEL (JP3) Logic low = on 60 Hz DC_BUS (JP4) Logic high = on 60 Hz PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 MC3PHAC CORRECTED PWMs MOTOR PHASE CURRENT WAVEFORMS UNCOMPENSATED COMPENSATED REMOVES 60 Hz HUM AND DECREASES I2R LOSSES |
类似零件编号 - MC3PHACVP |
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类似说明 - MC3PHACVP |
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