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ISL9N7030BLP3 数据表(PDF) 7 Page - Fairchild Semiconductor |
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ISL9N7030BLP3 数据表(HTML) 7 Page - Fairchild Semiconductor |
7 / 10 page ©2002 Fairchild Semiconductor Corporation ISL9N7030BLP3, ISL9N7030BLS3ST Rev. B PSPICE Electrical Model .SUBCKT ISL9N7030BL 2 1 3 ; rev Dec2000 CA 12 8 1.5e-9 CB 15 14 1.75e-9 CIN 6 8 2.35e-9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 32.7 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 4.58e-9 LSOURCE 3 7 1.47e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 2.5e-3 RGATE 9 20 3.4 RLDRAIN 2 5 10 RLGATE 1 9 45.8 RLSOURCE 3 7 14.7 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 2.55e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*200),5))} .MODEL DBODYMOD D (IS = 1.9e-11 N=1.075 RS = 4.2e-3 TRS1 = 9e-4 TRS2 = 1e-6 XTI=2.2 CJO = 1.1e-9 TT = 8e-11 M = 0.49) .MODEL DBREAKMOD D (RS = 1.7e- 1TRS1 = 1e- 3TRS2 = -8.9e-6) .MODEL DPLCAPMOD D (CJO = 8.2e-1 0IS = 1e-3 0N = 10 M = 0.45) .MODEL MMEDMOD NMOS (VTO = 1.9 KP = 3 IS=1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.4) .MODEL MSTROMOD NMOS (VTO = 2.35KP = 90 IS = 1e-30 N= 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.6 KP = 0.05 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 34 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1e- 3TC2 = -7e-7) .MODEL RDRAINMOD RES (TC1 = 7e-3 TC2 = 1e-5) .MODEL RSLCMOD RES (TC1 = 1e-3 TC2 = 1e-6) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -2.7e-3 TC2 = -1e-5) .MODEL RVTEMPMOD RES (TC1 = -1.8e- 3TC2 = 1e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.0 VOFF= -0.8) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.8 VOFF= -4.0) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.3 VOFF= 0.2) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.2 VOFF= -0.3) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. 18 22 + - 6 8 + - 5 51 19 8 + - 17 18 6 8 + - 5 8 + - RBREAK RVTEMP VBAT RVTHRES IT 17 18 19 22 12 13 15 S1A S1B S2A S2B CA CB EGS EDS 14 8 13 8 14 13 MWEAK EBREAK DBODY RSOURCE SOURCE 11 7 3 LSOURCE RLSOURCE CIN RDRAIN EVTHRES 16 21 8 MMED MSTRO DRAIN 2 LDRAIN RLDRAIN DBREAK DPLCAP ESLC RSLC1 10 5 51 50 RSLC2 1 GATE RGATE EVTEMP 9 ESG LGATE RLGATE 20 + - + - + - 6 ISL9N7030BLP3, ISL9N7030BLS3ST |
类似零件编号 - ISL9N7030BLP3 |
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类似说明 - ISL9N7030BLP3 |
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