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ISL9N7030BLP3 Datasheet(数据表) 5 Page - Fairchild Semiconductor |
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ISL9N7030BLP3 Datasheet(HTML) 5 Page - Fairchild Semiconductor |
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5 page 
©2002 Fairchild Semiconductor Corporation ISL9N7030BLP3, ISL9N7030BLS3ST Rev. B FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 12. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT FIGURE 13. SWITCHING TIME vs GATE RESISTANCE FIGURE 14. SWITCHING TIME vs GATE RESISTANCE Typical Performance Curves (Continued) 100 1000 0.1 1 10 30 4000 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 0V, f = 1MHz CISS = CGS + CGD COSS ≅ CDS + CGD CRSS = CGD 0 2 4 6 8 10 0 1020304050 Qg, GATE CHARGE (nC) ID = 14A WAVEFORMS IN DESCENDING ORDER: ID = 48A VDD = 15V 0 50 100 150 200 250 0 10 20304050 RGS, GATE TO SOURCE RESISTANCE (Ω) VGS = 4.5V, VDD = 15V, ID = 15A td(OFF) tr td(ON) tf 0 50 100 150 200 250 300 350 0 10 20 304050 RGS, GATE TO SOURCE RESISTANCE (Ω) td(OFF) tr td(ON) tf VGS = 10V, VDD = 15V, ID = 15A Test Circuits and Waveforms FIGURE 15. GATE CHARGE TEST CIRCUIT FIGURE 16. GATE CHARGE WAVEFORMS RL VGS + - VDS VDD DUT Ig(REF) VDD Qg(TH) VGS = 1V Qg(5) VGS = 5V Qg(TOT) VGS = 10V VDS VGS Ig(REF) 0 0 Qgs Qgd ISL9N7030BLP3, ISL9N7030BLS3ST |
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