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ISL9N310AD3 Datasheet(数据表) 1 Page - Fairchild Semiconductor |
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ISL9N310AD3 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 page ![]() ©2002 Fairchild Semiconductor Corporation January 2002 Rev. B January 2002 ISL9N310AD3/ISL9N310AD3ST N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs General Description This device employs a new advanced trench MOSFET technology and features low gate charge while maintaining low on-resistance. Optimized for switching applications, this device improves the overall efficiency of DC/DC converters and allows operation to higher switching frequencies. Applications • DC/DC converters Features • Fast switching •rDS(ON) = 0.008Ω (Typ), VGS = 10V •rDS(ON) = 0.0115Ω (Typ), VGS = 4.5V •Qg (Typ) = 17nC, VGS = 5V •Qgd (Typ) = 5.4nC •CISS (Typ) = 1800pF MOSFET Maximum Ratings T A = 25°C unless otherwise noted Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units VDSS Drain to Source Voltage 30 V VGS Gate to Source Voltage ±20 V ID Drain Current 35 A Continuous (TC = 25 oC, V GS = 10V) Continuous (TC = 100 oC, V GS = 4.5V) 35 A Continuous (TC = 25 oC, V GS = 10V, R θJA = 52 oC/W) 12 A Pulsed Figure 4 A PD Power dissipation Derate above 25oC 70 0.47 W W/oC TJ, TSTG Operating and Storage Temperature -55 to 175 oC RθJC Thermal Resistance Junction to Case TO-251, TO-252 2.14 oC/W RθJA Thermal Resistance Junction to Ambient TO-251, TO-252 100 oC/W RθJA Thermal Resistance Junction to Ambient TO-252, 1in2 copper pad area 52 oC/W Device Marking Device Package Reel Size Tape Width Quantity N310AD ISL9N310AD3ST TO-252AA 330mm 16mm 2500 units N310AD ISL9N310AD3 TO-251AA Tube N/A 75 GATE SOURCE DRAIN (FLANGE) DRAIN (FLANGE) DRAIN SOURCE GATE D G S TO-252 TO-251 |