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ISL9N307AD3ST Datasheet(数据表) 1 Page - Fairchild Semiconductor |
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ISL9N307AD3ST Datasheet(HTML) 1 Page - Fairchild Semiconductor |
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1 page 
©2002 Fairchild Semiconductor Corporation February 2002 Rev. B, February 2002 ISL9N307AD3ST N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs General Description This device employs a new advanced trench MOSFET technology and features low gate charge while maintaining low on-resistance. Optimized for switching applications, this device improves the overall efficiency of DC/DC converters and allows operation to higher switching frequencies. Applications • DC/DC converters Features • Fast switching •rDS(ON) = 0.006Ω (Typ), VGS = 10V •rDS(ON) = 0.010Ω (Typ), VGS = 4.5V •Qg (Typ) = 28nC, VGS = 5V •Qgd (Typ) = 10nC •CISS (Typ) = 3000pF MOSFET Maximum Ratings T A = 25°C unless otherwise noted Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units VDSS Drain to Source Voltage 30 V VGS Gate to Source Voltage ±20 V ID Drain Current 50 A Continuous (TC = 25 oC, V GS = 10V) Continuous (TC = 100 oC, V GS = 4.5V) 50 A Continuous (TC = 25 oC, V GS = 10V, R θJA = 52 oC/W) 15 A Pulsed Figure 4 A PD Power dissipation Derate above 25oC 100 0.67 W W/oC RθJC Thermal Resistance Junction to Case TO-252 1.36 oC/W RθJA Thermal Resistance Junction to Ambient TO-252 100 oC/W RθJA Thermal Resistance Junction to Ambient TO-252, 1in2 copper pad area 52 oC/W Device Marking Device Package Reel Size Tape Width Quantity N307AD ISL9N307AD3ST TO-252AA 330mm 16mm 2500 units GATE SOURCE DRAIN (FLANGE) D G S TO-252 |
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