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5AGXFB1D431C4N 数据表(PDF) 22 Page - Altera Corporation |
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5AGXFB1D431C4N 数据表(HTML) 22 Page - Altera Corporation |
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22 / 82 page  1–16 Chapter 1: Overview for the Arria V Device Family Enhanced Configuration and Configuration via Protocol Arria V Device Handbook February 2012 Altera Corporation Volume 1: Device Overview and Datasheet Enhanced Configuration and Configuration via Protocol Arria V devices support 3.3-V programming voltage and the following configuration modes: ■ active serial (AS) ■ passive serial (PS) ■ fast passive parallel (FPP) ■ CvP ■ Configuration via HPS ■ configuration through JTAG You can configure Arria V devices through PCIe using CvP instead of an external flash or ROM. The CvP mode offers the fastest configuration rate and flexibility with the easy-to-use PCIe hard IP block interface. The Arria V CvP implementation conforms to the PCIe 100-ms power-up-to-active time requirement. f For more information regarding CvP, refer to the Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide. Table 1–11 lists the configuration modes that Arria V devices support. Power Management Arria V devices leverage FPGA architectural features and process technology advancements to reduce the total device core power consumption by as much as 50% when compared with Stratix IV devices at the same performance level. Additionally, Arria V devices have a number of hard IP blocks that not only reduce logic resources but also deliver substantial power savings when compared with soft implementations. The list includes PCIe Gen1 and Gen2, XAUI, GbE, SRIO, GPON and CPRI protocols. The hard IP blocks consume up to 25% less power than equivalent soft implementations. Table 1–11. Configuration Modes and Features for Arria V Devices Mode Data Width (Bit) Maximum Clock Rate (MHz) Maximum Data Rate (Mbps) Decompression Design Security Remote System Update Partial Reconfiguration AS 1, 4 100 — vv v — PS 1 125 125 vv —— FPP 8, 16 125 — vv Parallel flash loader 16-bit only CvP x1, x2, x4, x8 (1) —— vv v v HPS 32 125 — vv Parallel flash loader v JTAG 1 33 33 — — — — Note to Table 1–11: (1) Number of lanes instead of bits. |
类似零件编号 - 5AGXFB1D431C4N |
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类似说明 - 5AGXFB1D431C4N |
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