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5AGXFB1G627C4N 数据表(PDF) 47 Page - Altera Corporation |
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5AGXFB1G627C4N 数据表(HTML) 47 Page - Altera Corporation |
47 / 82 page Chapter 2: Device Datasheet for Arria V Devices 2–19 Switching Characteristics February 2012 Altera Corporation Arria V Device Handbook Volume 1: Device Overview and Datasheet Differential and common mode return loss PCIe (Gen1 and Gen2), GIGE, XAUI, SDI, CPRI, OBSAI, SFI Compliant — Programmable ppm detector (6) — ±62.5, 100, 125, 200, 250, 300, 500, and 1000 ppm Run Length — — — 200 UI Programmable equalization — — — 4 dB Programmable DC gain DC Gain Setting = 0 — 0 — dB DC Gain Setting = 1 — 3 — dB Transmitter Supported I/O Standards 1.5 V PCML Data rate (6-Gbps transceiver) — 611 — 6375 Mbps Data rate (10-Gbps transceiver) — 6.376 9.8304 10.3125 Gbps VOCM — — 650 — mV Differential on-chip termination resistors 85- setting — 85 — 100- setting — 100 — 120- setting — 120 — 150- setting — 150 — Rise time (7) — 30 — 160 ps Fall time (7) — 30 — 160 ps CMU PLL Supported data range — 0.611 — 10.3125 Gbps Transceiver-FPGA Fabric Interface Interface speed (80-bit mode) — 25 — 159.375 MHz Interface speed (single-width mode) — 25 — 156.25 MHz Interface speed (double-width mode) — 25 — 159.375 MHz Notes to Table 2–21: (1) Speed grades shown in Table 2–21 refer to the Transceiver Speed Grade in the device ordering code. For more information about device ordering codes, refer to the Overview for Arria V Device Family chapter. (2) Differential LVPECL signal levels must comply to the minimum and maximum peak-to-peak differential input voltage specified in this table. (3) The reference clock common mode voltage is equal to the VCCR_GXB power supply level. (4) The device cannot tolerate prolonged operation at this absolute maximum. (5) The differential eye opening specification at the receiver input pins assumes that you have disabled the Receiver Equalization feature. If you enable the Receiver Equalization feature, the receiver circuitry can tolerate a lower minimum eye opening, depending on the equalization level. (6) The rate match FIFO supports only up to ±300 ppm. (7) The Quartus II software automatically selects the appropriate slew rate depending on the configured data rate or functional mode. Table 2–21. Transceiver Specifications for Arria V GT Devices—Preliminary (1) (Part 2 of 2) Symbol/ Description Conditions –5 Industrial Speed Grade Unit Min Typ Max |
类似零件编号 - 5AGXFB1G627C4N |
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类似说明 - 5AGXFB1G627C4N |
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