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EP2A15 数据表(PDF) 33 Page - Altera Corporation |
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EP2A15 数据表(HTML) 33 Page - Altera Corporation |
33 / 36 page Package Page 33 Enhanced Configuration (EPC) Devices Datasheet January 2012 Altera Corporation Figure 8 shows the PCB routing for the 88-pin UFBGA package. The Gerber file for this layout is on the Altera website. Figure 8. PCB Routing for 88-Pin UFBGA Package (1) Notes to Figure 8: (1) If the external flash interface feature is not used, then the flash pins should be left unconnected because they are internally connected to the controller unit. The only pins that need external connections are WP#, WE#, and RP#. If the flash is being used as an external memory source, then the flash pins should be connected as outlined in the pin descriptions section. (2) F-RP# and F-WE# are pins on the flash die. C-RP# and C-WE# are pins on the controller die. C-WE# and F-WE# should be connected together on the PCB. F-RP# and C-RP# should also be connected together on the PCB. (3) WP# (write protection pin) should be connected to a high level (3.3 V) to be able to program the flash bottom boot block, which is required when programming the device using the Quartus II software. (4) RY/BY# is only available in Sharp flash-based EPC devices. (5) Pin D3 is a NC pin for Intel Flash-based EPC16. NC OE VCC TCK TDI TDO TMS nCS GND A20 A16 GND WP# (3) NC A18 EXCLK A11 A8 VCCW NC A17 A5 A15 A10 nINIT CONF TM1 A19 PGM2 A7 A4 A14 A9 PGM1 VCC DQ11 PORSEL A6 A0 A13 DQ15 DQ13 A12 GND DCLK DATA7 NC DATA6 DATA5 DQ7 DQ14 PGM0 NC GND TM0 OE# GND CE# DATA0 GND VCC A1 A2 A3 DQ9 DATA4 DATA3 DATA2 DATA1 DQ5 VCC DQ3 DQ1 DQ4 VCC DQ2 DQ0 DQ6 DQ12 VCC DQ10 DQ8 NC VCC RY/BY# C-WE# F-WE# F-RP# C-RP# (2) (2) (2) (2) (4) (5) |
类似零件编号 - EP2A15 |
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类似说明 - EP2A15 |
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