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EG80C188XL20 数据表(PDF) 34 Page - Intel Corporation

部件名 EG80C188XL20
功能描述  16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

EG80C188XL20 数据表(HTML) 34 Page - Intel Corporation

Back Button EG80C188XL20 Datasheet HTML 30Page - Intel Corporation EG80C188XL20 Datasheet HTML 31Page - Intel Corporation EG80C188XL20 Datasheet HTML 32Page - Intel Corporation EG80C188XL20 Datasheet HTML 33Page - Intel Corporation EG80C188XL20 Datasheet HTML 34Page - Intel Corporation EG80C188XL20 Datasheet HTML 35Page - Intel Corporation EG80C188XL20 Datasheet HTML 36Page - Intel Corporation EG80C188XL20 Datasheet HTML 37Page - Intel Corporation EG80C188XL20 Datasheet HTML 38Page - Intel Corporation Next Button
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80C186XL80C188XL
AC SPECIFICATIONS (Continued)
272431 – 12
NOTES
1 Status inactive in state preceding T4
2 The data hold time lasts only until INTA goes inactive even if the INTA transition occurs prior to TCLDX (min)
3 INTA occurs one clock later in Slave Mode
4 For write cycle followed by interrupt acknowledge cycle
5 LOCK is active upon T1 of the first interrupt acknowledge cycle and inactive upon T2 of the second interrupt acknowl-
edge cycle
6 Changes in T-state preceding next bus cycle if followed by write
Pin names in parentheses apply to the 80C188XL
Figure 8 Interrupt Acknowledge Cycle Waveforms
34


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