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EG80C188XL20 数据表(PDF) 24 Page - Intel Corporation

部件名 EG80C188XL20
功能描述  16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
Download  48 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

EG80C188XL20 数据表(HTML) 24 Page - Intel Corporation

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80C186XL80C188XL
AC SPECIFICATIONS
MAJOR CYCLE TIMINGS (READ CYCLE)
TA e 0 Cto a70 C VCC e 5V g10%
All timings are measured at 15V and 50 pF loading on CLKOUT unless otherwise noted
All output test conditions are with CL e 50 pF
For AC tests input VIL e 045V and VIH e 24V except at X1 where VIH e VCC b 05V
Values
Conditions
Test
Symbol
Parameter
80C186XL25
80C186XL20
80C186XL12
Unit
Min
Max
Min
Max
Min
Max
80C186XL GENERAL TIMING REQUIREMENTS (Listed More Than Once)
TDVCL Data in Setup (AD)
8
10
15
ns
TCLDX
Data in Hold (AD)
3
3
3
ns
80C186XL GENERAL TIMING RESPONSES (Listed More Than Once)
TCHSV Status Active Delay
3
20
3
25
3
35
ns
TCLSH Status Inactive Delay
3
20
3
25
3
35
ns
TCLAV
Address Valid Delay
3
20
3
27
3
36
ns
TCLAX
Address Hold
0
0
0
ns
TCLDV Data Valid Delay
3
20
3
27
3
36
ns
TCHDX Status Hold Time
10
10
10
ns
TCHLH ALE Active Delay
20
20
25
ns
TLHLL
ALE Width
TCLCL b 15
TCLCL b 15
TCLCL b 15
ns
TCHLL
ALE Inactive Delay
20
20
25
ns
TAVLL
Address Valid to ALE Low
TCLCH b 10
TCLCH b 10
TCLCH b 15
ns
Equal
Loading
TLLAX
Address Hold from ALE
TCHCL b 8TCHCL b 10
TCHCL b 15
ns
Equal
Inactive
Loading
TAVCH Address Valid to Clock High
0
0
0
ns
TCLAZ
Address Float Delay
TCLAX
20
TCLAX
20
TCLAX
25
ns
TCLCSV Chip-Select Active Delay
3
20
3
25
3
33
ns
TCXCSX Chip-Select Hold from
TCLCH b 10
TCLCH b 10
TCLCH b 10
ns
Equal
Command Inactive
Loading
TCHCSX Chip-Select Inactive Delay
3
17
3
20
3
30
ns
TDXDL DEN Inactive to DTR Low
0
0
0
ns
Equal
Loading
TCVCTV Control Active Delay 1
3
17
3
22
3
37
ns
TCVDEX DEN Inactive Delay
3
17
3
22
3
37
ns
TCHCTV Control Active Delay 2
3
20
3
22
3
37
ns
TCLLV
LOCK ValidInvalid Delay
3
17
3
22
3
37
ns
24


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