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EG80C188XL20 数据表(PDF) 15 Page - Intel Corporation

部件名 EG80C188XL20
功能描述  16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS
Download  48 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

EG80C188XL20 数据表(HTML) 15 Page - Intel Corporation

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80C186XL80C188XL
Table 3 Pin Descriptions
(Continued)
Pin
Pin
Input
Output
Pin Description
Name
Type
Type
States
PCS6 A2
O
H(1)H(X)
Peripheral Chip Select 6 or Latched A2 may be programmed
to provide a seventh peripheral chip select or to provide an
R(1)
internally latched A2 signal The address range activating
PCS6 is software-programmable PCS6 A2 does not float
during bus HOLD When programmed to provide latched A2
this pin will retain the previously latched value during HOLD
DTR
O
H(Z)
Data TransmitReceive controls the direction of data flow
through an external data bus transceiver When LOW data is
R(Z)
transferred to the procesor When HIGH the processor
places write data on the data bus
DEN
O
H(Z)
Data Enable is provided as a data bus transceiver output
enable DEN is active LOW during each memory and IO
R(1Z)
access (including 80C187 access) DEN is HIGH whenever
DTR changes state During RESET DEN is driven HIGH for
one clock then floated
NC
Not connected To maintain compatibility with future
products do not connect to these pins
NOTE
Pin names in parentheses apply to the 80C188XL
15


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