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HUF76139P3 Datasheet(数据表) 6 Page - Fairchild Semiconductor |
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HUF76139P3 Datasheet(HTML) 6 Page - Fairchild Semiconductor |
6 page ![]() ©2003 Fairchild Semiconductor Corporation HUF76139P3, HUF76139S3S Rev. B1 FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT FIGURE 15. SWITCHING TIME vs GATE RESISTANCE FIGURE 16. SWITCHING TIME vs GATE RESISTANCE Test Circuits and Waveforms FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS Typical Performance Curves (Continued) 0 1000 2000 3000 4000 0 5 10 15 20 25 30 CISS COSS CRSS VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 0 2 4 6 8 10 0 2040 6080 VDD = 15V ID = 75A ID = 50A ID = 25A WAVEFORMS IN DESCENDING ORDER: Qg, GATE CHARGE (nC) 0 200 400 600 800 0 1020304050 RGS, GATE TO SOURCE RESISTANCE (Ω) VGS = 4.5V, VDD = 15V, ID = 61A, RL = 0.246Ω tr tf td(OFF) td(ON) 0 100 300 400 500 0 1020304050 VGS = 10V, VDD = 15V, ID = 75A, RL= 0.2Ω RGS, GATE TO SOURCE RESISTANCE (Ω) 200 tf tr td(OFF) td(ON) tP VGS 0.01 Ω L IAS + - VDS VDD RG DUT VARY tP TO OBTAIN REQUIRED PEAK IAS 0V VDD VDS BVDSS tP IAS tAV 0 HUF76139P3, HUF76139S3S |