数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD7799BRUZ 数据表(PDF) 6 Page - Analog Devices

部件名 AD7799BRUZ
功能描述  3-Channel, Low Noise, Low Power, 16-/24-Bit, ADC with On-Chip In-Amp
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7799BRUZ 数据表(HTML) 6 Page - Analog Devices

Back Button AD7799BRUZ Datasheet HTML 2Page - Analog Devices AD7799BRUZ Datasheet HTML 3Page - Analog Devices AD7799BRUZ Datasheet HTML 4Page - Analog Devices AD7799BRUZ Datasheet HTML 5Page - Analog Devices AD7799BRUZ Datasheet HTML 6Page - Analog Devices AD7799BRUZ Datasheet HTML 7Page - Analog Devices AD7799BRUZ Datasheet HTML 8Page - Analog Devices AD7799BRUZ Datasheet HTML 9Page - Analog Devices AD7799BRUZ Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 28 page
background image
AD7798/AD7799
Data Sheet
Rev. B | Page 6 of 28
TIMING CHARACTERISTICS
AVDD = 2.7 V to 5.25 V, DVDD = 2.7 V to 5.25 V, GND = 0 V, Input Logic 0 = 0 V, Input Logic 1 = DVDD, unless otherwise noted.
Table 2.
Parameter1, 2
Limit at TMIN, TMAX (B Version)
Unit
Conditions/Comments
t3
100
ns min
SCLK high pulse width
t4
100
ns min
SCLK low pulse width
Read Operation
t1
0
ns min
CS falling edge to DOUT/RDY active time
60
ns max
DVDD = 4.75 V to 5.25 V
80
ns max
DVDD = 2.7 V to 3.6 V
t23
0
ns min
SCLK active edge to data valid delay4
60
ns max
DVDD = 4.75 V to 5.25 V
80
ns max
DVDD = 2.7 V to 3.6 V
t55, 6
10
ns min
Bus relinquish time after CS inactive edge
80
ns max
t6
0
ns min
SCLK inactive edge to CS inactive edge
t7
10
ns min
SCLK inactive edge to DOUT/RDY high
Write Operation
t8
0
ns min
CS falling edge to SCLK active edge setup time4
t9
30
ns min
Data valid to SCLK edge setup time
t10
25
ns min
Data valid to SCLK edge hold time
t11
0
ns min
CS rising edge to SCLK edge hold time
1
Sample tested during initial release to ensure compliance. All input signals are specified with tR = tF = 5 ns (10% to 90% of DVDD) and timed from a voltage level of 1.6 V.
2
See Figure 3 and Figure 4.
3
These times are measured with the load circuit of Figure 2 and defined as the time required for the output to cross the VOL or VOH limits.
4
SCLK active edge is the falling edge of SCLK.
5
These times are derived from the measured time taken by the data output to change 0.5 V when loaded with the circuit of Figure 2. The measured time is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and, as such, are independent of external bus loading capacitances.
6
RDY returns high after a read of the ADC. In single-conversion mode and continuous-conversion mode, data can be reread, if required, while RDY is high, but care
should be taken to ensure that subsequent reads do not occur close to the next output update. In continuous read mode, the digital word can be read only once.
ISINK (1.6mA WITH DVDD = 5V,
100µA WITH DVDD = 3V)
ISOURCE (200µA WITH DVDD = 5V,
100µA WITH DVDD = 3V)
1.6V
TO
OUTPUT
PIN
50pF
Figure 2. Load Circuit for Timing Characterization


类似零件编号 - AD7799BRUZ

制造商部件名数据表功能描述
logo
Analog Devices
AD7799BRUZ-REEL AD-AD7799BRUZ-REEL Datasheet
897Kb / 28P
   3-Channel, Low Noise, Low Power, 16-/24-Bit, 誇-? ADC with On-Chip In-Amp
REV. A
More results

类似说明 - AD7799BRUZ

制造商部件名数据表功能描述
logo
Analog Devices
AD7799BRUZ-REEL AD-AD7799BRUZ-REEL Datasheet
897Kb / 28P
   3-Channel, Low Noise, Low Power, 16-/24-Bit, 誇-? ADC with On-Chip In-Amp
REV. A
AD7792 AD-AD7792_07 Datasheet
661Kb / 32P
   3-Channel, Low Noise, Low Power, 16-/24-Bit 誇-? ADC with On-Chip In-Amp and Reference
REV. B
AD7794 AD-AD7794_07 Datasheet
814Kb / 36P
   6-Channel, Low Noise, Low Power, 24-/16-Bit 誇-? ADC with On-Chip In-Amp and Reference
REV. D
AD7785 AD-AD7785 Datasheet
635Kb / 32P
   3-Channel, Low Noise, Low Power, 20-Bit ??? ADC with On-Chip In-Amp and Reference
REV. 0
AD7785 AD-AD7785_17 Datasheet
480Kb / 33P
   3-Channel, Low Noise, Low Power ADC with On-Chip In-Amp and Reference
AD7798 AD-AD7798 Datasheet
499Kb / 17P
   Low Power, 24-Bit/16-Bit Sigma-Delta ADC with In-Amp
Rev. B
AD7792 AD-AD7792 Datasheet
241Kb / 18P
   Low Power, 16/24-Bit Sigma-Delta ADC with Low-Noise In-Amp and Embedded Reference
REV.PrF 6/04
AD1555 AD-AD1555 Datasheet
429Kb / 24P
   24-Bit ADC WITH LOW NOISE PGA
REV. B
AD1555APZRL AD-AD1555APZRL Datasheet
435Kb / 24P
   24-Bit - ADC with Low Noise PGA
REV. B
AD1555 AD-AD1555_15 Datasheet
435Kb / 24P
   24-Bit ADC with Low Noise PGA
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com