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SL3ICS1002FUG 数据表(PDF) 11 Page - NXP Semiconductors |
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SL3ICS1002FUG 数据表(HTML) 11 Page - NXP Semiconductors |
11 / 51 page 139037 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.7 — 9 October 2012 139037 11 of 51 NXP Semiconductors SL3ICS1002/1202 UCODE G2XM and G2XL 8.1.5 Au bump • Bump material: > 99.9% pure Au • Bump hardness: 35 – 80 HV 0.005 • Bump shear strength: > 70 MPa • Bump height: 18 m • Bump height uniformity: – within a die: ± 2 m – within a wafer: ± 3 m – wafer to wafer: ± 4 m • Bump flatness: ± 1.5 m • Bump size: – RFP, RFN 60 x 60 m – TP1, TP2 60 x 60 m – Bump size variation: ± 5 m • Under bump metallization: sputtered TiW 8.1.6 Fail die identification No inkdots are applied to the wafer. Electronic wafer mapping (SECS II format) covers the electrical test results and additionally the results of mechanical/visual inspection. See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on UV-tape with electronic fail die marking, BL-ID document number: 1093**” 8.1.7 Map file distribution See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on UV-tape with electronic fail die marking, BL-ID document number: 1093**” |
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