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74LVC1G126GX 数据表(PDF) 10 Page - NXP Semiconductors |
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74LVC1G126GX 数据表(HTML) 10 Page - NXP Semiconductors |
10 / 21 page 74LVC1G126 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 12 — 2 July 2012 10 of 21 NXP Semiconductors 74LVC1G126 Bus buffer/line driver; 3-state Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 10. Test circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 10. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 1.65 V to 1.95 V VCC 2.0ns 30pF 1k open GND 2VCC 2.3 V to 2.7 V VCC 2.0 ns 30 pF 500 open GND 2VCC 2.7 V 2.7 V 2.5 ns 50 pF 500 open GND 6 V 3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 open GND 6 V 4.5 V to 5.5 V VCC 2.5 ns 50 pF 500 open GND 2VCC |
类似零件编号 - 74LVC1G126GX |
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类似说明 - 74LVC1G126GX |
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