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ADXL362BCCZ-RL 数据表(PDF) 7 Page - Analog Devices |
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ADXL362BCCZ-RL 数据表(HTML) 7 Page - Analog Devices |
7 / 44 page Data Sheet ADXL362 Rev. B | Page 7 of 44 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. NC = NO CONNECT. THIS PIN IS NOT INTERNALLY CONNECTED. NC VDDI/O RESERVED SCLK RESERVED GND GND INT1 RESERVED INT2 ADXL362 TOP VIEW (Not to Scale) 1 2 3 4 5 13 12 11 10 9 6 7 8 16 15 14 Figure 4. Pin Configuration (Top View) Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 VDD I/O Supply Voltage for Digital I/O. 2 NC No Connect. Not internally connected. 3 Reserved Reserved. Can be left unconnected or connected to GND. 4 SCLK SPI Communications Clock. 5 Reserved Reserved. Can be left unconnected or connected to GND. 6 MOSI Master Output, Slave Input. SPI serial data input. 7 MISO Master Input, Slave Output. SPI serial data output. 8 CS SPI Chip Select, Active Low. Must be low during SPI communications. 9 INT2 Interrupt 2 Output. INT2 also serves as an input for synchronized sampling. 10 Reserved Reserved. Can be left unconnected, or connected to GND. 11 INT1 Interrupt 1 Output. INT1 also serves as an input for external clocking. 12 GND Ground. This pin must be grounded. 13 GND Ground. This pin must be grounded. 14 VS Supply Voltage. 15 NC No Connect. Not internally connected. 16 GND Ground. This pin must be grounded. |
类似零件编号 - ADXL362BCCZ-RL |
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类似说明 - ADXL362BCCZ-RL |
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