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N25Q032A13EF640F 数据表(PDF) 25 Page - Micron Technology

部件名 N25Q032A13EF640F
功能描述  32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface
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制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

N25Q032A13EF640F 数据表(HTML) 25 Page - Micron Technology

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N25Q032 - 3 V
Operating features
25/153
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
driving Chip Select (S) Low. For the value of tRHSL, see Table 31.: AC Characteristics. All
the lock bits are reset to 0 after a Reset Low pulse.
The Hold/Reset feature is not available when the Hold (Reset) / DQ3 pin is used as I/O
(DQ3 functionality) during Quad Instructions: QOFR, QIOFR,QIFP and QIEFP.
The Hold/Reset feature can be disabled by using of the bit 4 of the VECR.


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