N25Q032A13EF640F datasheet(73/153 Pages) MICRON

部件名	N25Q032A13EF640F

功能描述	32-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase, XiP enabled, serial flash memory with 108 MHz SPI bus interface

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制造商	MICRON [Micron Technology]

网页	http://www.micron.com

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73 / 153 page

N25Q032 - 3 V

Instructions

73/153

Micron Technology, Inc., reserves the right to change products or specifications without notice.

Figure 27.

How to permanently lock the OTP bytes

9.1.18

Subsector Erase (SSE)

The Subsector Erase (SSE) instruction sets to '1' (FFh) all bits inside the chosen subsector.

Before it can be accepted, a Write Enable (WREN) instruction must previously have been

executed. After the Write Enable (WREN) instruction has been decoded, the device sets the

Write Enable Latch (WEL).

The Subsector Erase (SSE) instruction is entered by driving Chip Select (S) Low, followed

by the instruction code, and three address bytes on Serial Data input (DQ0). Any address

inside the subsector is a valid address for the Subsector Erase (SSE) instruction. Chip

Select (S) must be driven Low for the entire duration of the sequence.

Chip Select (S) must be driven High after the eighth bit of the last address byte has been

latched in, otherwise the Subsector Erase (SSE) instruction is not executed. As soon as

Chip Select (S) is driven High, the self-timed Subsector Erase cycle (whose duration is

tSSE) is initiated. While the Subsector Erase cycle is in progress, the Status Register may

be read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP)

bit is 1 during the self-timed Subsector Erase cycle, and is 0 when it is completed. At some

unspecified time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.

Alternately, it is possible to read the Flag Status Register to check if the internal modify cycle

is finished.

A Subsector Erase (SSE) instruction issued to a sector that is hardware or software

protected, is not executed. Any Subsector Erase (SSE) instruction, while an Erase or

Program cycle is in progress, is rejected without having any effects on the cycle that is in

progress. A Subsector Erase cycle can be paused by a Program/Erase Suspend (PES)

instruction and resumed by a Program/Erase Resume (PER) instruction.

Byte

0

Byte

1

Byte

2

Byte

64

Byte

63

X

bit 0

OTP control byte

64 data bytes

Bit 1 to bit 7 are not programmable

When bit 0 = 0

the 64 OTP bytes

become read only

ai13587

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