Si3201-BS datasheet(11/108 Pages) SILABS

部件名	Si3201-BS

功能描述	PROSLIC PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION

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制造商	SILABS [Silicon Laboratories]

网页	http://www.silabs.com

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11 / 108 page

Si3230

Preliminary Rev. 0.96

11

Figure 2. SPI Timing Diagram

Table 10. Switching Characteristics—SPI

VDDA = VDDA = 3.13 to 5.25 V, TA = 0 to 70°C for K-Grade, –40 to 85°C for B-Grade, CL = 20 pF

Parameter

Symbol

Test

Conditions

Min

Typ

Max

Unit

Cycle Time SCLK

tc

0.062

—

µsec

Rise Time, SCLK

tr

—

25

ns

Fall Time, SCLK

tf

—

25

ns

Delay Time, SCLK Fall to SDO Active

td1

—

20

ns

Delay Time, SCLK Fall to SDO

Transition

td2

—

20

ns

Delay Time, CS Rise to SDO Tri-state

td3

—

20

ns

Setup Time, CS to SCLK Fall

tsu1

25

—

ns

Hold Time, CS to SCLK Rise

th1

20

—

ns

Setup Time, SDI to SCLK Rise

tsu2

25

—

ns

Hold Time, SDI to SCLK Rise

th2

20

—

ns

Delay Time between Chip Selects

(Continuous SCLK)

tcs

440

—

ns

Delay Time between Chip Selects

(Non-continuous SCLK)

tcs

220

—

ns

SDI to SDITHRU Propagation Delay

td4

—

4

10

ns

Note: All timing is referenced to the 50% level of the waveform. Input test levels are VIH = VDDD –0.4 V, VIL = 0.4 V

SCLK

CS

SDI

t

h1

t

d3

SDO

t

d1

t

d2

t

su1

t

r

t

r

t

c

t

su2

t

h2

t

cs

t

thru

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Silicon Laboratories	SI3201-BS	1Mb / 108P	PROSLIC짰 PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION

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