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MC33493DTBR2 数据表(PDF) 6 Page - Freescale Semiconductor, Inc |
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MC33493DTBR2 数据表(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 22 page PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7 State Machine Freescale Semiconductor 6 6 State Machine Figure 3 details the state machine. Figure 3. State machine State 1: The circuit is in standby mode and draws only a leakage current from the power supply. State 2: In this state, the PLL is out of the lock-in range; therefore, the RF output stage is switched off, preventing RF transmission. Data clock is available on the DATACLK pin. Each time the device is enabled, the state machine passes through this state. State 3: In this state, the PLL is within the lock-in range. If t < tPLL_lock_in, the PLL may be in acquisition mode. If t≥tPLL_lock_in, then the PLL is locked. Data entered on the DATA pin are output on the RFOUT pin according to the modulation selected by the level applied on the MODE pin. State 4: When the supply voltage falls below the shutdown voltage threshold (VSDWN,) the entire circuit switches off. After this shutdown, applying a low level on the ENABLE pin unlatches the circuit. Figure 4 shows the waveforms of the main signals for a typical application cycle. State 2 PLL out of lock-in range No RF output State 1 Standby mode ENABLE=1 PLL in lock-in range Vbattery < Vshutdown ENABLE=0 Power ON AND ENABLE=0 State 3 Transmission mode ENABLE=0 State 4 Shutdown mode PLL out of lock-in range |
类似零件编号 - MC33493DTBR2 |
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类似说明 - MC33493DTBR2 |
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