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74AVC16245DGVRG4 数据表(PDF) 2 Page - Texas Instruments |
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74AVC16245DGVRG4 数据表(HTML) 2 Page - Texas Instruments |
2 / 16 page www.ti.com DESCRIPTION (CONTINUED) TERMINAL ASSIGNMENTS DGG OR DGV PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE SN74AVC16245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES142L – JULY 1998 – REVISED MAY 2005 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74AVC16245 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (EACH 8-BIT TRANSCEIVER) INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation 2 |
类似零件编号 - 74AVC16245DGVRG4 |
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类似说明 - 74AVC16245DGVRG4 |
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