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FM28V202-TG 数据表(PDF) 7 Page - Cypress Semiconductor |
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FM28V202-TG 数据表(HTML) 7 Page - Cypress Semiconductor |
7 / 18 page FM28V202 - 128Kx16 F-RAM Document Number: 001-86602 Rev. ** Page 7 of 18 Software Write Protect Timing CE A(16:0) WE DQ(7:0) 12555 Data Data OE 01333 0ECCC 000FF 1FF00 1DAAA 0ECCC 0FF00 00000 1DAAA Figure 3. Sequence to Set Write-Protect Blocks Note: This sequence requires tAS ≥ 10ns and address must be stable while /CE is low. CE A(16:0) WE DQ(15:0) 12555 X 0x18 OE 01333 0ECCC 000FF 1FF00 0ECCC 00000 1DAAA tCE (read access time) 1AAAA Figure 4. Sequence to Read Write-Protect Settings Note: This sequence requires tAS ≥ 10ns and address must be stable while /CE is low. SRAM Drop-In Replacement The FM28V202 has been designed to be a drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each new address. /CE may remain low indefinitely. While /CE is low, the device automatically detects address changes and a new access is begun. This functionality allows /CE to be grounded as you might with an SRAM. It also allows page mode operation at speeds up to 33MHz. Note that if /CE is tied to ground, the user must be sure /WE is not low at powerup or powerdown events. If /CE and /WE are both low during power cycles, data corruption will occur. Figure 5 shows a pullup resistor on /WE which will keep the pin high during power cycles assuming the MCU/MPU pin tri-states during the reset condition. The pullup resistor value should be chosen to ensure the /WE pin tracks VDD yet a high enough value that the current drawn when /WE is low is not an issue. A 10Kohm resistor draws 330uA when /WE is low and VDD=3.3V. Note that software write-protect is not available to the user if the chip enable pins are hardwired active. Figure 5. Use of Pullup Resistor on /WE CE WE OE A(16:0) DQ FM28V202 VDD MCU/ MPU R |
类似零件编号 - FM28V202-TG |
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类似说明 - FM28V202-TG |
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